part4.hier_info

来自「几个ＶＨＤＬ的编程实例」· HIER_INFO 代码 · 共 31 行

|part4
D => D_latch:u3.D
D => D_latch:u2.D
D => D_latch:u1.D
Clock => D_latch:u2.Clk
Clock => D_latch:u1.Clk
Clock => D_latch:u3.Clk
Qa <= D_latch:u1.Q
Qb <= D_latch:u2.Q
Qc <= D_latch:u3.Q


|part4|D_latch:u1
D => Q$latch.DATAIN
Clk => Q$latch.LATCH_ENABLE
Q <= Q$latch.DB_MAX_OUTPUT_PORT_TYPE


|part4|D_latch:u2
D => Q$latch.DATAIN
Clk => Q$latch.LATCH_ENABLE
Q <= Q$latch.DB_MAX_OUTPUT_PORT_TYPE


|part4|D_latch:u3
D => Q$latch.DATAIN
Clk => Q$latch.LATCH_ENABLE
Q <= Q$latch.DB_MAX_OUTPUT_PORT_TYPE