part6.hier_info

几个ＶＨＤＬ的编程实例

|part6
SW[0] => mux3b51:M0.Y[0]
SW[1] => mux3b51:M0.Y[1]
SW[2] => mux3b51:M0.Y[2]
SW[3] => mux3b51:M0.X[0]
SW[4] => mux3b51:M0.X[1]
SW[5] => mux3b51:M0.X[2]
SW[6] => mux3b51:M0.W[0]
SW[7] => mux3b51:M0.W[1]
SW[8] => mux3b51:M0.W[2]
SW[9] => mux3b51:M0.V[0]
SW[10] => mux3b51:M0.V[1]
SW[11] => mux3b51:M0.V[2]
SW[12] => mux3b51:M0.U[0]
SW[13] => mux3b51:M0.U[1]
SW[14] => mux3b51:M0.U[2]
SW[15] => segment77:H08.M[0]
SW[15] => segment76:H07.M[0]
SW[15] => segment75:H06.M[0]
SW[15] => segment74:H05.M[0]
SW[15] => segment73:H04.M[0]
SW[15] => segment72:H03.M[0]
SW[15] => segment71:H02.M[0]
SW[15] => segment70:H01.M[0]
SW[15] => mux3b51:M0.S[0]
SW[16] => segment77:H08.M[1]
SW[16] => segment76:H07.M[1]
SW[16] => segment75:H06.M[1]
SW[16] => segment74:H05.M[1]
SW[16] => segment73:H04.M[1]
SW[16] => segment72:H03.M[1]
SW[16] => segment71:H02.M[1]
SW[16] => segment70:H01.M[1]
SW[16] => mux3b51:M0.S[1]
SW[17] => segment77:H08.M[2]
SW[17] => segment76:H07.M[2]
SW[17] => segment75:H06.M[2]
SW[17] => segment74:H05.M[2]
SW[17] => segment73:H04.M[2]
SW[17] => segment72:H03.M[2]
SW[17] => segment71:H02.M[2]
SW[17] => segment70:H01.M[2]
SW[17] => mux3b51:M0.S[2]
HEX0[0] <= segment70:H01.Display[0]
HEX0[1] <= segment70:H01.Display[1]
HEX0[2] <= segment70:H01.Display[2]
HEX0[3] <= segment70:H01.Display[3]
HEX0[4] <= segment70:H01.Display[4]
HEX0[5] <= segment70:H01.Display[5]
HEX0[6] <= segment70:H01.Display[6]
HEX1[0] <= segment71:H02.Display[0]
HEX1[1] <= segment71:H02.Display[1]
HEX1[2] <= segment71:H02.Display[2]
HEX1[3] <= segment71:H02.Display[3]
HEX1[4] <= segment71:H02.Display[4]
HEX1[5] <= segment71:H02.Display[5]
HEX1[6] <= segment71:H02.Display[6]
HEX2[0] <= segment72:H03.Display[0]
HEX2[1] <= segment72:H03.Display[1]
HEX2[2] <= segment72:H03.Display[2]
HEX2[3] <= segment72:H03.Display[3]
HEX2[4] <= segment72:H03.Display[4]
HEX2[5] <= segment72:H03.Display[5]
HEX2[6] <= segment72:H03.Display[6]
HEX3[0] <= segment73:H04.Display[0]
HEX3[1] <= segment73:H04.Display[1]
HEX3[2] <= segment73:H04.Display[2]
HEX3[3] <= segment73:H04.Display[3]
HEX3[4] <= segment73:H04.Display[4]
HEX3[5] <= segment73:H04.Display[5]
HEX3[6] <= segment73:H04.Display[6]
HEX4[0] <= segment74:H05.Display[0]
HEX4[1] <= segment74:H05.Display[1]
HEX4[2] <= segment74:H05.Display[2]
HEX4[3] <= segment74:H05.Display[3]
HEX4[4] <= segment74:H05.Display[4]
HEX4[5] <= segment74:H05.Display[5]
HEX4[6] <= segment74:H05.Display[6]
HEX5[0] <= segment75:H06.Display[0]
HEX5[1] <= segment75:H06.Display[1]
HEX5[2] <= segment75:H06.Display[2]
HEX5[3] <= segment75:H06.Display[3]
HEX5[4] <= segment75:H06.Display[4]
HEX5[5] <= segment75:H06.Display[5]
HEX5[6] <= segment75:H06.Display[6]
HEX6[0] <= segment76:H07.Display[0]
HEX6[1] <= segment76:H07.Display[1]
HEX6[2] <= segment76:H07.Display[2]
HEX6[3] <= segment76:H07.Display[3]
HEX6[4] <= segment76:H07.Display[4]
HEX6[5] <= segment76:H07.Display[5]
HEX6[6] <= segment76:H07.Display[6]
HEX7[0] <= segment77:H08.Display[0]
HEX7[1] <= segment77:H08.Display[1]
HEX7[2] <= segment77:H08.Display[2]
HEX7[3] <= segment77:H08.Display[3]
HEX7[4] <= segment77:H08.Display[4]
HEX7[5] <= segment77:H08.Display[5]
HEX7[6] <= segment77:H08.Display[6]


|part6|mux3b51:M0
S[0] => Mux0.IN2
S[0] => Mux1.IN2
S[0] => Mux2.IN2
S[1] => Mux0.IN1
S[1] => Mux1.IN1
S[1] => Mux2.IN1
S[2] => Mux0.IN0
S[2] => Mux1.IN0
S[2] => Mux2.IN0
U[0] => Mux2.IN3
U[1] => Mux1.IN3
U[2] => Mux0.IN3
V[0] => Mux2.IN4
V[1] => Mux1.IN4
V[2] => Mux0.IN4
W[0] => Mux2.IN5
W[1] => Mux1.IN5
W[2] => Mux0.IN5
X[0] => Mux2.IN6
X[1] => Mux1.IN6
X[2] => Mux0.IN6
Y[0] => Mux2.IN7
Y[0] => Mux2.IN8
Y[0] => Mux2.IN9
Y[0] => Mux2.IN10
Y[1] => Mux1.IN7
Y[1] => Mux1.IN8
Y[1] => Mux1.IN9
Y[1] => Mux1.IN10
Y[2] => Mux0.IN7
Y[2] => Mux0.IN8
Y[2] => Mux0.IN9
Y[2] => Mux0.IN10
M[0] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
M[1] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
M[2] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|part6|segment70:H01
M[0] => Mux1.IN10
M[0] => Mux2.IN10
M[0] => Mux3.IN10
M[0] => Mux4.IN5
M[0] => Mux5.IN5
M[0] => Mux6.IN10
M[1] => Mux0.IN5
M[1] => Mux1.IN9
M[1] => Mux2.IN9
M[1] => Mux3.IN9
M[1] => Mux4.IN4
M[1] => Mux5.IN4
M[1] => Mux6.IN9
M[2] => Mux0.IN4
M[2] => Mux1.IN8
M[2] => Mux2.IN8
M[2] => Mux3.IN8
M[2] => Mux6.IN8
Display[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
Display[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
Display[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
Display[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
Display[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
Display[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
Display[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|part6|segment71:H02
M[0] => Mux0.IN10
M[0] => Mux1.IN10
M[0] => Mux2.IN10
M[0] => Mux4.IN5
M[0] => Mux5.IN5
M[0] => Mux6.IN10
M[1] => Mux0.IN9
M[1] => Mux1.IN9
M[1] => Mux2.IN9
M[1] => Mux3.IN5
M[1] => Mux4.IN4
M[1] => Mux5.IN4
M[1] => Mux6.IN9
M[2] => Mux0.IN8
M[2] => Mux1.IN8
M[2] => Mux2.IN8
M[2] => Mux3.IN4
M[2] => Mux6.IN8
Display[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
Display[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
Display[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
Display[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
Display[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
Display[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
Display[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|part6|segment72:H03
M[0] => Mux1.IN10
M[0] => Mux2.IN10
M[0] => Mux3.IN10
M[0] => Mux4.IN5
M[0] => Mux5.IN5
M[0] => Mux6.IN10
M[1] => Mux0.IN5
M[1] => Mux1.IN9
M[1] => Mux2.IN9
M[1] => Mux3.IN9
M[1] => Mux4.IN4
M[1] => Mux5.IN4
M[1] => Mux6.IN9
M[2] => Mux0.IN4
M[2] => Mux1.IN8
M[2] => Mux2.IN8
M[2] => Mux3.IN8
M[2] => Mux6.IN8
Display[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
Display[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
Display[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
Display[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
Display[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
Display[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
Display[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|part6|segment73:H04
M[0] => Mux0.IN10
M[0] => Mux1.IN10
M[0] => Mux2.IN10
M[0] => Mux3.IN5
M[0] => Mux4.IN5
M[0] => Mux5.IN10
M[1] => Mux0.IN9
M[1] => Mux1.IN9
M[1] => Mux2.IN9
M[1] => Mux3.IN4
M[1] => Mux4.IN4
M[1] => Mux5.IN9
M[2] => Mux0.IN8
M[2] => Mux1.IN8
M[2] => Mux2.IN8
M[2] => Mux5.IN8
M[2] => Display[3].DATAIN
Display[0] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
Display[1] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
Display[2] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
Display[3] <= M[2].DB_MAX_OUTPUT_PORT_TYPE
Display[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
Display[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
Display[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|part6|segment74:H05
M[0] => Mux1.IN10
M[0] => Mux2.IN10
M[0] => Mux3.IN10
M[0] => Mux4.IN5
M[0] => Mux5.IN5
M[0] => Mux6.IN10
M[1] => Mux0.IN5
M[1] => Mux1.IN9
M[1] => Mux2.IN9
M[1] => Mux3.IN9
M[1] => Mux4.IN4
M[1] => Mux5.IN4
M[1] => Mux6.IN9
M[2] => Mux0.IN4
M[2] => Mux1.IN8
M[2] => Mux2.IN8
M[2] => Mux3.IN8
M[2] => Mux6.IN8
Display[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
Display[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
Display[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
Display[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
Display[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
Display[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
Display[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|part6|segment75:H06
M[0] => Mux0.IN10
M[0] => Mux1.IN10
M[0] => Mux2.IN10
M[0] => Mux4.IN5
M[0] => Mux5.IN5
M[0] => Mux6.IN10
M[1] => Mux0.IN9
M[1] => Mux1.IN9
M[1] => Mux2.IN9
M[1] => Mux3.IN5
M[1] => Mux4.IN4
M[1] => Mux5.IN4
M[1] => Mux6.IN9
M[2] => Mux0.IN8
M[2] => Mux1.IN8
M[2] => Mux2.IN8
M[2] => Mux3.IN4
M[2] => Mux6.IN8
Display[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
Display[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
Display[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
Display[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
Display[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
Display[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
Display[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|part6|segment76:H07
M[0] => Mux1.IN10
M[0] => Mux2.IN10
M[0] => Mux3.IN10
M[0] => Mux4.IN5
M[0] => Mux5.IN5
M[0] => Mux6.IN10
M[1] => Mux0.IN5
M[1] => Mux1.IN9
M[1] => Mux2.IN9
M[1] => Mux3.IN9
M[1] => Mux4.IN4
M[1] => Mux5.IN4
M[1] => Mux6.IN9
M[2] => Mux0.IN4
M[2] => Mux1.IN8
M[2] => Mux2.IN8
M[2] => Mux3.IN8
M[2] => Mux6.IN8
Display[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
Display[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
Display[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
Display[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
Display[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
Display[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
Display[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|part6|segment77:H08
M[0] => Mux0.IN10
M[0] => Mux1.IN10
M[0] => Mux2.IN10
M[0] => Mux3.IN5
M[0] => Mux4.IN5
M[0] => Mux5.IN10
M[1] => Mux0.IN9
M[1] => Mux1.IN9
M[1] => Mux2.IN9
M[1] => Mux3.IN4
M[1] => Mux4.IN4
M[1] => Mux5.IN9
M[2] => Mux0.IN8
M[2] => Mux1.IN8
M[2] => Mux2.IN8
M[2] => Mux5.IN8
M[2] => Display[3].DATAIN
Display[0] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
Display[1] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
Display[2] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
Display[3] <= M[2].DB_MAX_OUTPUT_PORT_TYPE
Display[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
Display[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
Display[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE