part2.hier_info

几个ＶＨＤＬ的编程实例

|part2
X[0] => M~7.DATAB
X[1] => M~6.DATAB
X[2] => M~5.DATAB
X[3] => M~4.DATAB
X[4] => M~3.DATAB
X[5] => M~2.DATAB
X[6] => M~1.DATAB
X[7] => M~0.DATAB
Y[0] => M~7.DATAA
Y[1] => M~6.DATAA
Y[2] => M~5.DATAA
Y[3] => M~4.DATAA
Y[4] => M~3.DATAA
Y[5] => M~2.DATAA
Y[6] => M~1.DATAA
Y[7] => M~0.DATAA
S => M~0.OUTPUTSELECT
S => M~1.OUTPUTSELECT
S => M~2.OUTPUTSELECT
S => M~3.OUTPUTSELECT
S => M~4.OUTPUTSELECT
S => M~5.OUTPUTSELECT
S => M~6.OUTPUTSELECT
S => M~7.OUTPUTSELECT
M[0] <= M~7.DB_MAX_OUTPUT_PORT_TYPE
M[1] <= M~6.DB_MAX_OUTPUT_PORT_TYPE
M[2] <= M~5.DB_MAX_OUTPUT_PORT_TYPE
M[3] <= M~4.DB_MAX_OUTPUT_PORT_TYPE
M[4] <= M~3.DB_MAX_OUTPUT_PORT_TYPE
M[5] <= M~2.DB_MAX_OUTPUT_PORT_TYPE
M[6] <= M~1.DB_MAX_OUTPUT_PORT_TYPE
M[7] <= M~0.DB_MAX_OUTPUT_PORT_TYPE