📄 adeos-ipipe-2.6.12-bf533-1.2-00.patch
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- call return_from_int;+ handle_irq; RESTORE_CONTEXT rti; @@ -237,11 +281,7 @@ ENTRY(_evt_evt13) fp = 0; #endif r0 = EVT_IVG13_P;- r1 = sp;- SP += -12;- call _do_irq;- SP += 12;- call return_from_int;+ handle_irq; RESTORE_CONTEXT rti; diff -uNrp linux-2.6.12/arch/blackfin/mach-common/ints-priority-sc.c 2.6.12-ipipe/arch/blackfin/mach-common/ints-priority-sc.c--- linux-2.6.12/arch/blackfin/mach-common/ints-priority-sc.c 2005-12-07 03:14:48.000000000 +0100+++ 2.6.12-ipipe/arch/blackfin/mach-common/ints-priority-sc.c 2006-02-14 22:40:13.000000000 +0100@@ -6,7 +6,7 @@ * Created: ? * Description: Set up the interupt priorities *- * Rev: $Id: ints-priority-sc.c,v 1.20 2005/12/07 02:14:48 jiez Exp $+ * Rev: $Id: ints-priority-sc.c,v 1.2 2006/02/14 21:40:13 rpm Exp $ * * Modified: * 1996 Roman Zippel@@ -130,8 +130,8 @@ static void ack_noop(unsigned int irq) static void bf533_core_mask_irq(unsigned int irq) { irq_flags &= ~(1 << irq);- if (!irqs_disabled())- local_irq_enable();+ if (!irqs_disabled_hw())+ local_irq_enable_hw(); } static void bf533_core_unmask_irq(unsigned int irq)@@ -146,8 +146,8 @@ static void bf533_core_unmask_irq(unsign * local_irq_enable just does "STI irq_flags", so it's exactly * what we need. */- if (!irqs_disabled())- local_irq_enable();+ if (!irqs_disabled_hw())+ local_irq_enable_hw(); return; } @@ -164,13 +164,21 @@ static void bf533_internal_unmask_irq(un } static struct irqchip bf533_core_irqchip = {+#ifdef CONFIG_IPIPE+ .ack = bf533_core_mask_irq,+#else /* !CONFIG_IPIPE */ .ack = ack_noop,+#endif /* CONFIG_IPIPE */ .mask = bf533_core_mask_irq, .unmask = bf533_core_unmask_irq, }; static struct irqchip bf533_internal_irqchip = {+#ifdef CONFIG_IPIPE+ .ack = bf533_internal_mask_irq,+#else /* !CONFIG_IPIPE */ .ack = ack_noop,+#endif /* CONFIG_IPIPE */ .mask = bf533_internal_mask_irq, .unmask = bf533_internal_unmask_irq, };@@ -188,19 +196,19 @@ static void bf537_generic_error_mask_irq error_int_mask &= ~(1L << (irq - IRQ_PPI_ERROR)); if (!error_int_mask) {- local_irq_disable();+ local_irq_disable_hw(); *pSIC_IMASK |= 1 << (IRQ_GENERIC_ERROR - (IRQ_CORETMR + 1)); __builtin_bfin_ssync();- local_irq_enable();+ local_irq_enable_hw(); } } static void bf537_generic_error_unmask_irq(unsigned int irq) {- local_irq_disable();+ local_irq_disable_hw(); *pSIC_IMASK |= 1 << (IRQ_GENERIC_ERROR - (IRQ_CORETMR + 1)); __builtin_bfin_ssync();- local_irq_enable();+ local_irq_enable_hw(); error_int_mask |= 1L << (irq - IRQ_PPI_ERROR); }@@ -266,6 +274,10 @@ static void bf533_gpio_ack_irq(unsigned int gpionr = irq - IRQ_PF0; int mask = (1L << gpionr); *pFIO_FLAG_C = mask;+#ifdef CONFIG_IPIPE+ __builtin_bfin_ssync();+ *pFIO_MASKB_C = mask;+#endif /* CONFIG_IPIPE */ /* if (gpio_edge_triggered & mask) { * ack * } else {@@ -510,3 +522,73 @@ void do_irq(int vec, struct pt_regs *fp) } asm_do_IRQ(vec, fp); }++#ifdef CONFIG_IPIPE++int __ipipe_get_irq_priority(unsigned irq)+{+ int ient, prio;++ if (irq <= IRQ_CORETMR)+ return irq;++ for (ient = 0; ient < NR_PERI_INTS; ient++) {+ struct ivgx *ivg = ivg_table + ient;+ if (ivg->irqno == irq) {+ for (prio = 0; prio <= IVG13-IVG7; prio++) {+ if (ivg7_13[prio].ifirst <= ivg &&+ ivg7_13[prio].istop > ivg) {+ return prio + IVG7;+ }+ }+ }+ }++ return IVG13; /* Parano飀. */+}++/* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */++asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)+{+ struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop;+ struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst;+ unsigned long sic_status;+ ipipe_declare_cpuid;+ int irq;++ if (likely(vec == EVT_IVTMR_P)) {+ irq = IRQ_CORETMR;+ goto handle_irq;+ }++ __builtin_bfin_ssync();+ sic_status = *pSIC_IMASK & *pSIC_ISR;++ for(;; ivg++) {+ if (ivg >= ivg_stop) {+ num_spurious++;+ return 0;+ }+ else if (sic_status & ivg->isrflag)+ break;+ }++ irq = ivg->irqno;++ ipipe_load_cpuid();++ if (irq == IRQ_SYSTMR)+ /* for update_process_times() */+ __ipipe_tick_regs[cpuid].ipend = regs->ipend;++handle_irq:++ __ipipe_handle_irq(irq, regs);++ return (ipipe_percpu_domain[cpuid] == ipipe_root_domain &&+ !test_bit(IPIPE_STALL_FLAG,+ &ipipe_root_domain->cpudata[cpuid].status));+}++#endif /* CONFIG_IPIPE */diff -uNrp linux-2.6.12/include/asm-blackfin/bitops.h 2.6.12-ipipe/include/asm-blackfin/bitops.h--- linux-2.6.12/include/asm-blackfin/bitops.h 2005-10-28 05:01:42.000000000 +0200+++ 2.6.12-ipipe/include/asm-blackfin/bitops.h 2006-02-11 22:41:02.000000000 +0100@@ -87,9 +87,9 @@ static __inline__ void set_bit(int nr, v a += nr >> 5; mask = 1 << (nr & 0x1f);- local_irq_save(flags);+ local_irq_save_hw(flags); *a |= mask;- local_irq_restore(flags);+ local_irq_restore_hw(flags); } static __inline__ void __set_bit(int nr, volatile unsigned long *addr)@@ -115,9 +115,9 @@ static __inline__ void clear_bit(int nr, unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f);- local_irq_save(flags);+ local_irq_save_hw(flags); *a &= ~mask;- local_irq_restore(flags);+ local_irq_restore_hw(flags); } static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)@@ -137,9 +137,9 @@ static __inline__ void change_bit(int nr ADDR += nr >> 5; mask = 1 << (nr & 31);- local_irq_save(flags);+ local_irq_save_hw(flags); *ADDR ^= mask;- local_irq_restore(flags);+ local_irq_restore_hw(flags); } static __inline__ void __change_bit(int nr, volatile unsigned long *addr)@@ -160,10 +160,10 @@ static __inline__ int test_and_set_bit(i a += nr >> 5; mask = 1 << (nr & 0x1f);- local_irq_save(flags);+ local_irq_save_hw(flags); retval = (mask & *a) != 0; *a |= mask;- local_irq_restore(flags);+ local_irq_restore_hw(flags); return retval; }@@ -188,10 +188,10 @@ static __inline__ int test_and_clear_bit a += nr >> 5; mask = 1 << (nr & 0x1f);- local_irq_save(flags);+ local_irq_save_hw(flags); retval = (mask & *a) != 0; *a &= ~mask;- local_irq_restore(flags);+ local_irq_restore_hw(flags); return retval; }@@ -216,10 +216,10 @@ static __inline__ int test_and_change_bi a += nr >> 5; mask = 1 << (nr & 0x1f);- local_irq_save(flags);+ local_irq_save_hw(flags); retval = (mask & *a) != 0; *a ^= mask;- local_irq_restore(flags);+ local_irq_restore_hw(flags); return retval; } diff -uNrp linux-2.6.12/include/asm-blackfin/ipipe.h 2.6.12-ipipe/include/asm-blackfin/ipipe.h--- linux-2.6.12/include/asm-blackfin/ipipe.h 1970-01-01 01:00:00.000000000 +0100+++ 2.6.12-ipipe/include/asm-blackfin/ipipe.h 2006-02-12 00:01:04.000000000 +0100@@ -0,0 +1,184 @@+/* -*- linux-c -*-+ * include/asm-blackfin/ipipe.h+ *+ * Copyright (C) 2002-2005 Philippe Gerum.+ *+ * This program is free software; you can redistribute it and/or modify+ * it under the terms of the GNU General Public License as published by+ * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,+ * USA; either version 2 of the License, or (at your option) any later+ * version.+ *+ * This program is distributed in the hope that it will be useful,+ * but WITHOUT ANY WARRANTY; without even the implied warranty of+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the+ * GNU General Public License for more details.+ *+ * You should have received a copy of the GNU General Public License+ * along with this program; if not, write to the Free Software+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.+ */++#ifndef __BFINNOMMU_IPIPE_H+#define __NBINNOMMU_IPIPE_H++#include <linux/config.h>++#ifdef CONFIG_IPIPE++#include <linux/cpumask.h>+#include <linux/list.h>+#include <linux/threads.h>+#include <asm/ptrace.h>+#include <asm/mach/irq.h>+#include <asm/bitops.h>+#include <asm/traps.h>+#include <asm/irqchip.h>++#define IPIPE_ARCH_STRING "1.2-00"+#define IPIPE_MAJOR_NUMBER 1+#define IPIPE_MINOR_NUMBER 2+#define IPIPE_PATCH_NUMBER 0++#define IPIPE_NR_XIRQS NR_IRQS+#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */++/* Blackfin-specific, global domain flags */+#define IPIPE_ROOTLOCK_FLAG 1 /* Lock pipeline for root */++#ifdef CONFIG_SMP+#error "I-pipe/blackfin: SMP not implemented"+#else /* !CONFIG_SMP */+#define ipipe_processor_id() 0+#endif /* CONFIG_SMP */++#define prepare_arch_switch(rq, next) \+do { \+ __ipipe_dispatch_event(IPIPE_EVENT_SCHEDULE,next); \+ local_irq_disable_hw(); \+} while(0)++#define task_running(rq, p) ((rq)->curr == (p))+#define finish_arch_switch(rq, next) spin_unlock_irq(&(rq)->lock)++#define task_hijacked(p) \+ ({ int x = ipipe_current_domain != ipipe_root_domain; \+ __clear_bit(IPIPE_SYNC_FLAG,&ipipe_root_domain->cpudata[task_cpu(p)].status); \+ local_irq_enable_hw(); x; })++ /* Blackfin traps -- i.e. exception vector numbers */+#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */+/* Pseudo-vectors used for kernel events */+#define IPIPE_FIRST_EVENT IPIPE_NR_FAULTS+#define IPIPE_EVENT_SYSCALL (IPIPE_FIRST_EVENT)+#define IPIPE_EVENT_SCHEDULE (IPIPE_FIRST_EVENT + 1)+#define IPIPE_EVENT_SIGWAKE (IPIPE_FIRST_EVENT + 2)+#define IPIPE_EVENT_SETSCHED (IPIPE_FIRST_EVENT + 3)+#define IPIPE_EVENT_EXIT (IPIPE_FIRST_EVENT + 4)+#define IPIPE_LAST_EVENT IPIPE_EVENT_EXIT+#define IPIPE_NR_EVENTS (IPIPE_LAST_EVENT + 1)++struct ipipe_domain;++struct ipipe_sysinfo {++ int ncpus; /* Number of CPUs on board */+ u64 cpufreq; /* CPU frequency (in Hz) */++ /* Arch-dependent block */++ struct {+ unsigned tmirq; /* Timer tick IRQ */+ u64 tmfreq; /* Timer frequency */+ } archdep;+};++#define ipipe_read_tsc(t) \+ ({ \+ unsigned long __cy2; \+ __asm__ __volatile__ ( "1: %0 = CYCLES2\n" \+ "%1 = CYCLES\n" \+ "%2 = CYCLES2\n" \+ "CC = %2 == %0\n" \+ "if ! CC jump 1b\n" \+ :"=r" (((unsigned long *)&t)[1]), \+ "=r" (((unsigned long *)&t)[0]), \+ "=r" (__cy2) \+ : /*no input*/ : "CC"); \+ t; \+ })++#define ipipe_cpu_freq() __ipipe_core_clock+#define ipipe_tsc2ns(_t) (((unsigned long)(_t)) * __ipipe_freq_scale)++/* Private interface -- Internal use only */++void ipipe_stall_root_raw(void);++void ipipe_unstall_root_raw(void);++#define __ipipe_check_platform() do { } while(0)++#define __ipipe_init_platform() do { } while(0)++#define __ipipe_enable_irq(irq) irq_desc[irq].chip->unmask(irq)++#define __ipipe_disable_irq(irq) irq_desc[irq].chip->mask(irq)++#define __ipipe_lock_root() \+ set_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)++#define __ipipe_unlock_root() \+ clear_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)++void __ipipe_enable_pipeline(void);++void __ipipe_sync_stage(unsigned long syncmask);++int __ipipe_ack_irq(unsigned irq);++void __ipipe_do_IRQ(unsigned irq,+ struct pt_regs *regs);++void __ipipe_do_timer(unsigned irq,+ struct pt_regs *regs);++void __ipipe_handle_irq(unsigned irq,+ struct pt_regs *regs);++int __ipipe_get_irq_priority(unsigned irq);++extern struct pt_regs __ipipe_tick_regs[];++extern unsigned long __ipipe_core_clock;++extern unsigned long __ipipe_freq_scale;++extern unsigned long __ipipe_irq_tail_hook;++#define IPIPE_TIMER_IRQ IRQ_CORETMR++#define IRQ_SYSTMR IRQ_TMR0++#define IRQ_PRIOTMR CONFIG_TIMER0++unsigned long get_cclk(void); /* Core clock freq (HZ) */++unsigned long get_sclk(void); /* System clock freq (HZ) */++#else /* !CONFIG_IPIPE */++#define ipipe_stall_root_raw() do { } while(0)+#define ipipe_unstall_root_raw() do { } while(0)+#define task_hijacked(p) 0+#define ipipe_trap_notify(t,r) 0++#define IRQ_SYSTMR IRQ_CORETMR++#define IRQ_PRIOTMR IRQ_CORETMR++#endif /* CONFIG_IPIPE */++int init_irqthreads(void);++#endif /* !__BFINNOMMU_IPIPE_H */diff -uNrp linux-2.6.12/include/asm-blackfin/irqchip.h 2.6.12-ipipe/include/asm-blackfin/irqchip.h--- linux-2.6.12/include/asm-blackfin/irqchip.h 2005-10-28 05:01:42.000000000 +0200+++ 2.6.12-ipipe/include/asm-blackfin/irqchip.h 2006-02-11 22:41:02.000000000 +0100@@ -14,6 +14,10 @@ struct irqdesc;⌨️ 快捷键说明
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