adeos-ipipe-2.4.25-ppc-denx-1.0-03.patch

xenomai 很好的linux实时补丁

+			else {
+				__ipipe_switch_to(this_domain, next_domain, cpuid);
+
+				ipipe_load_cpuid();	/* Processor might have changed. */
+
+				if (this_domain->cpudata[cpuid].irq_pending_hi != 0
+				    && !test_bit(IPIPE_STALL_FLAG,
+						 &this_domain->cpudata[cpuid].status))
+					__ipipe_sync_stage(IPIPE_IRQMASK_ANY);
+			}
+
+			break;
+		} else if (next_domain == this_domain)
+			break;
+
+		pos = next_domain->p_link.next;
+	}
+}
+
+/*
+ * __ipipe_handle_irq() -- IPIPE's generic IRQ handler. An optimistic
+ * interrupt protection log is maintained here for each domain. Hw
+ * interrupts are off on entry.
+ */
+void __ipipe_handle_irq(int irq, struct pt_regs *regs)
+{
+	struct ipipe_domain *this_domain;
+	struct list_head *head, *pos;
+	ipipe_declare_cpuid;
+	int m_ack, s_ack;
+
+	m_ack = (regs == NULL);	/* Software-triggered IRQs do not need
+				 * any ack. */
+	if (irq >= IPIPE_NR_IRQS) {
+		printk(KERN_ERR "I-pipe: spurious interrupt %d\n", irq);
+		return;
+	}
+
+	ipipe_load_cpuid();
+
+	this_domain = ipipe_percpu_domain[cpuid];
+
+	s_ack = m_ack;
+
+	if (test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))
+		head = &this_domain->p_link;
+	else
+		head = __ipipe_pipeline.next;
+
+	/* Ack the interrupt. */
+
+	pos = head;
+
+	while (pos != &__ipipe_pipeline) {
+		struct ipipe_domain *next_domain =
+			list_entry(pos, struct ipipe_domain, p_link);
+
+		/*
+		 * For each domain handling the incoming IRQ, mark it as
+		 * pending in its log.
+		 */
+		if (test_bit(IPIPE_HANDLE_FLAG,
+			     &next_domain->irqs[irq].control)) {
+			/*
+			 * Domains that handle this IRQ are polled for
+			 * acknowledging it by decreasing priority order. The
+			 * interrupt must be made pending _first_ in the
+			 * domain's status flags before the PIC is unlocked.
+			 */
+
+			next_domain->cpudata[cpuid].irq_counters[irq].total_hits++;
+			next_domain->cpudata[cpuid].irq_counters[irq].pending_hits++;
+			__ipipe_set_irq_bit(next_domain, cpuid, irq);
+			ipipe_mark_irq_receipt(next_domain, irq, cpuid);
+
+			/*
+			 * Always get the first master acknowledge available.
+			 * Once we've got it, allow slave acknowledge
+			 * handlers to run (until one of them stops us).
+			 */
+			if (next_domain->irqs[irq].acknowledge != NULL) {
+				if (!m_ack)
+					m_ack = next_domain->irqs[irq].acknowledge(irq);
+				else if (test_bit
+					 (IPIPE_SHARED_FLAG,
+					  &next_domain->irqs[irq].control) && !s_ack)
+					s_ack = next_domain->irqs[irq].acknowledge(irq);
+			}
+		}
+
+		/*
+		 * If the domain does not want the IRQ to be passed down the
+		 * interrupt pipe, exit the loop now.
+		 */
+
+		if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control))
+			break;
+
+		pos = next_domain->p_link.next;
+	}
+
+	/*
+	 * Now walk the pipeline, yielding control to the highest
+	 * priority domain that has pending interrupt(s) or
+	 * immediately to the current domain if the interrupt has been
+	 * marked as 'sticky'. This search does not go beyond the
+	 * current domain in the pipeline.
+	 */
+
+	__ipipe_walk_pipeline(head, cpuid);
+}
+
+asmlinkage int __ipipe_grab_irq(struct pt_regs *regs)
+{
+	extern int ppc_spurious_interrupts;
+	ipipe_declare_cpuid;
+	int irq, first = 1;
+
+	if ((irq = ppc_md.get_irq(regs)) >= 0) {
+		__ipipe_handle_irq(irq, regs);
+		first = 0;
+	} else if (irq != -2 && first)
+		ppc_spurious_interrupts++;
+
+	ipipe_load_cpuid();
+
+	return (ipipe_percpu_domain[cpuid] == ipipe_root_domain &&
+		!test_bit(IPIPE_STALL_FLAG,
+			  &ipipe_root_domain->cpudata[cpuid].status));
+}
+
+void __ipipe_do_IRQ(int irq, struct pt_regs *regs)
+{
+	int cpu = smp_processor_id();
+	hardirq_enter(cpu);
+	ppc_irq_dispatch_handler(regs, irq);
+	hardirq_exit(cpu);
+
+	if (softirq_pending(cpu))
+		do_softirq();
+}
+
+asmlinkage int __ipipe_grab_timer(struct pt_regs *regs)
+{
+	ipipe_declare_cpuid;
+
+#ifdef CONFIG_POWER4
+	/* On 970 CPUs DEC cannot be disabled, and without setting DEC
+	 * here, DEC interrupt would be triggered as soon as interrupts
+	 * are enabled in __ipipe_sync_stage
+	 */
+	set_dec(0x7fffffff);
+#endif
+
+	__ipipe_tick_regs[cpuid].msr = regs->msr; /* for do_timer() */
+
+	__ipipe_handle_irq(IPIPE_TIMER_VIRQ, regs);
+
+	ipipe_load_cpuid();
+
+#ifndef CONFIG_40x
+	if (__ipipe_decr_ticks != tb_ticks_per_jiffy) {
+		unsigned long long next_date, now;
+
+		next_date = __ipipe_decr_next[cpuid];
+
+		while ((now = __ipipe_read_timebase()) >= next_date)
+			next_date += __ipipe_decr_ticks;
+
+		set_dec(next_date - now);
+
+		__ipipe_decr_next[cpuid] = next_date;
+	}
+#endif	/* !CONFIG_40x */
+
+	return (ipipe_percpu_domain[cpuid] == ipipe_root_domain &&
+		!test_bit(IPIPE_STALL_FLAG,
+			  &ipipe_root_domain->cpudata[cpuid].status));
+}
+
+void __ipipe_do_timer(int irq, struct pt_regs *regs)
+{
+	timer_interrupt(regs);
+}
+
+asmlinkage int __ipipe_check_root(struct pt_regs *regs)
+{
+	ipipe_declare_cpuid;
+	/*
+	 * This routine is called with hw interrupts off, so no migration
+	 * can occur while checking the identity of the current domain.
+	 */
+	ipipe_load_cpuid();
+	return (ipipe_percpu_domain[cpuid] == ipipe_root_domain &&
+		!test_bit(IPIPE_STALL_FLAG,
+			  &ipipe_root_domain->cpudata[cpuid].status));
+}
+
+asmlinkage void __ipipe_stall_root_raw(void)
+{
+	ipipe_declare_cpuid;
+
+	ipipe_load_cpuid();	/* hw IRQs are off on entry. */
+
+	__set_bit(IPIPE_STALL_FLAG,
+		  &ipipe_root_domain->cpudata[cpuid].status);
+
+	ipipe_mark_domain_stall(ipipe_root_domain, cpuid);
+
+	local_irq_enable_hw();
+}
+
+asmlinkage void __ipipe_unstall_root_raw(void)
+{
+	ipipe_declare_cpuid;
+
+	local_irq_disable_hw();
+
+	ipipe_load_cpuid();
+
+	__clear_bit(IPIPE_STALL_FLAG,
+		    &ipipe_root_domain->cpudata[cpuid].status);
+
+	ipipe_mark_domain_unstall(ipipe_root_domain, cpuid);
+}
+
+int __ipipe_syscall_root(struct pt_regs *regs)
+{
+	ipipe_declare_cpuid;
+	unsigned long flags;
+
+	/*
+	 * This routine either returns:
+	 * 0 -- if the syscall is to be passed to Linux;
+	 * >0 -- if the syscall should not be passed to Linux, and no
+	 * tail work should be performed;
+	 * <0 -- if the syscall should not be passed to Linux but the
+	 * tail work has to be performed (for handling signals etc).
+	 */
+
+	if (__ipipe_event_pipelined_p(IPIPE_EVENT_SYSCALL) &&
+	    __ipipe_dispatch_event(IPIPE_EVENT_SYSCALL,regs) > 0) {
+		if (ipipe_current_domain == ipipe_root_domain) {
+			/*
+			 * Sync pending VIRQs before _TIF_NEED_RESCHED
+			 * is tested.
+			 */
+			ipipe_lock_cpu(flags);
+			if ((ipipe_root_domain->cpudata[cpuid].irq_pending_hi & IPIPE_IRQMASK_VIRT) != 0)
+				__ipipe_sync_stage(IPIPE_IRQMASK_VIRT);
+			ipipe_unlock_cpu(flags);
+			return -1;
+		}
+		return 1;
+	}
+
+	return 0;
+}
+
+EXPORT_SYMBOL(_switch_to);
+EXPORT_SYMBOL(context_map);
+EXPORT_SYMBOL(last_task_used_math);
+#ifdef FEW_CONTEXTS
+EXPORT_SYMBOL(nr_free_contexts);
+EXPORT_SYMBOL(context_mm);
+EXPORT_SYMBOL(steal_context);
+#endif
diff -uNrp 2.4.25-ppc/arch/ppc/kernel/irq.c 2.4.25-ppc-ipipe/arch/ppc/kernel/irq.c
--- 2.4.25-ppc/arch/ppc/kernel/irq.c	2003-11-15 02:11:32.000000000 +0100
+++ 2.4.25-ppc-ipipe/arch/ppc/kernel/irq.c	2005-11-09 17:22:26.000000000 +0100
@@ -433,7 +433,9 @@ void ppc_irq_dispatch_handler(struct pt_
 
 	kstat.irqs[cpu][irq]++;
 	spin_lock(&desc->lock);
+#ifndef CONFIG_IPIPE
 	ack_irq(irq);
+#endif /* CONFIG_IPIPE */
 	/*
 	   REPLAY is when Linux resends an IRQ that was dropped earlier
 	   WAITING is used by probe to mark irqs that are being tested
diff -uNrp 2.4.25-ppc/arch/ppc/kernel/ppc_ksyms.c 2.4.25-ppc-ipipe/arch/ppc/kernel/ppc_ksyms.c
--- 2.4.25-ppc/arch/ppc/kernel/ppc_ksyms.c	2005-03-27 00:50:41.000000000 +0100
+++ 2.4.25-ppc-ipipe/arch/ppc/kernel/ppc_ksyms.c	2005-11-12 23:32:06.000000000 +0100
@@ -314,6 +314,7 @@ EXPORT_SYMBOL(screen_info);
 #endif
 
 EXPORT_SYMBOL(__delay);
+#ifndef CONFIG_IPIPE
 EXPORT_SYMBOL(__sti);
 EXPORT_SYMBOL(__sti_end);
 EXPORT_SYMBOL(__cli);
@@ -322,6 +323,7 @@ EXPORT_SYMBOL(__save_flags_ptr);
 EXPORT_SYMBOL(__save_flags_ptr_end);
 EXPORT_SYMBOL(__restore_flags);
 EXPORT_SYMBOL(__restore_flags_end);
+#endif /* CONFIG_IPIPE */
 EXPORT_SYMBOL(timer_interrupt_intercept);
 EXPORT_SYMBOL(timer_interrupt);
 EXPORT_SYMBOL(do_IRQ_intercept);
diff -uNrp 2.4.25-ppc/arch/ppc/kernel/traps.c 2.4.25-ppc-ipipe/arch/ppc/kernel/traps.c
--- 2.4.25-ppc/arch/ppc/kernel/traps.c	2005-03-16 00:12:45.000000000 +0100
+++ 2.4.25-ppc-ipipe/arch/ppc/kernel/traps.c	2005-11-09 15:48:16.000000000 +0100
@@ -211,6 +211,9 @@ MachineCheckException(struct pt_regs *re
 {
 	unsigned long reason = get_reason(regs);
 
+	if (ipipe_trap_notify(IPIPE_TRAP_MCE,regs))
+	    	return;
+
 	if (user_mode(regs)) {
 		_exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
 		return;
@@ -314,6 +317,8 @@ SMIException(struct pt_regs *regs)
 void
 UnknownException(struct pt_regs *regs)
 {
+	if (ipipe_trap_notify(IPIPE_TRAP_UNKNOWN,regs))
+	    	return;
 	printk("Bad trap at PC: %lx, SR: %lx, vector=%lx    %s\n",
 	       regs->nip, regs->msr, regs->trap, print_tainted());
 	_exception(SIGTRAP, regs, 0, 0);
@@ -322,6 +327,8 @@ UnknownException(struct pt_regs *regs)
 void
 InstructionBreakpoint(struct pt_regs *regs)
 {
+	if (ipipe_trap_notify(IPIPE_TRAP_IABR,regs))
+	    	return;
 	if (debugger_iabr_match(regs))
 		return;
 	_exception(SIGTRAP, regs, TRAP_BRKPT, 0);
@@ -330,6 +337,8 @@ InstructionBreakpoint(struct pt_regs *re
 void
 RunModeException(struct pt_regs *regs)
 {
+	if (ipipe_trap_notify(IPIPE_TRAP_RM,regs))
+	    	return;
 	_exception(SIGTRAP, regs, 0, 0);
 }
 
@@ -382,6 +391,8 @@ static void emulate_single_step(struct p
 {
 	if (single_stepping(regs)) {
 		clear_single_step(regs);
+		if (ipipe_trap_notify(IPIPE_TRAP_SSTEP,regs))
+		    	return;
 		if (debugger_sstep(regs))
 			return;
 		_exception(SIGTRAP, regs, TRAP_TRACE, 0);
@@ -394,6 +405,9 @@ ProgramCheckException(struct pt_regs *re
 	unsigned int reason = get_reason(regs);
 	extern int do_mathemu(struct pt_regs *regs);
 
+	if (ipipe_trap_notify(IPIPE_TRAP_PCE,regs))
+	    	return;
+
 #ifdef CONFIG_MATH_EMULATION
 	/* (reason & REASON_ILLEGAL) would be the obvious thing here,
 	 * but there seems to be a hardware bug on the 405GP (RevD)
@@ -457,6 +471,8 @@ void
 SingleStepException(struct pt_regs *regs)
 {
 	regs->msr &= ~MSR_SE;  /* Turn off 'trace' bit */
+	if (ipipe_trap_notify(IPIPE_TRAP_SSTEP,regs))
+	    	return;
 	if (debugger_sstep(regs))
 		return;
 	_exception(SIGTRAP, regs, TRAP_TRACE, 0);
@@ -473,6 +489,8 @@ AlignmentException(struct pt_regs *regs)
 		emulate_single_step(regs);
 		return;
 	}
+	if (ipipe_trap_notify(IPIPE_TRAP_ALIGNMENT,regs))
+	    	return;
 	if (fixed == -EFAULT) {
 		/* fixed == -EFAULT means the operand address was bad */
 		if (user_mode(regs))
@@ -510,6 +528,9 @@ SoftwareEmulation(struct pt_regs *regs)
 	extern int Soft_emulate_8xx(struct pt_regs *);
 	int errcode;
 
+	if (ipipe_trap_notify(IPIPE_TRAP_SOFTEMU,regs))
+	    	return;
+
 	if (!user_mode(regs)) {
 		debugger(regs);
 		die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
@@ -538,6 +559,9 @@ void DebugException(struct pt_regs *regs
 {
 	unsigned long debug_status;
 
+	if (ipipe_trap_notify(IPIPE_TRAP_DEBUG,regs))
+	    	return;
+
 	debug_status = mfspr(SPRN_DBSR);
 
 	regs->msr &= ~MSR_DE;  /* Turn off 'debug' bit */
@@ -574,6 +598,8 @@ TAUException(struct pt_regs *regs)
 void
 AltivecAssistException(struct pt_regs *regs)
 {
+	if (ipipe_trap_notify(IPIPE_TRAP_ALTASSIST,regs))
+	    	return;
 	if (regs->msr & MSR_VEC)
 		giveup_altivec(current);
 	/* XXX quick hack for now: set the non-Java bit in the VSCR */
@@ -603,6 +629,9 @@ SPEFloatingPointException(struct pt_regs
 	int fpexc_mode;
 	int code = 0;
 
+	if (ipipe_trap_notify(IPIPE_TRAP_SPE,regs))
+	    	return;
+
 	spefscr = current->thread.spefscr;
 	fpexc_mode = current->thread.fpexc_mode;
 
diff -uNrp 2.4.25-ppc/arch/ppc/mm/fault.c 2.4.25-ppc-ipipe/arch/ppc/mm/fault.c
--- 2.4.25-ppc/arch/ppc/mm/fault.c	2005-03-16 00:12:45.000000000 +0100
+++ 2.4.25-ppc-ipipe/arch/ppc/mm/fault.c	2005-11-09 15:44:32.000000000 +0100
@@ -119,6 +119,9 @@ void do_page_fault(struct pt_regs *regs,
 		is_write = error_code & 0x02000000;
 #endif /* CONFIG_4xx || CONFIG_BOOKE */
 
+	if (ipipe_trap_notify(IPIPE_TRAP_ACCESS,regs))
+	    	return;
+
 #if defined(CONFIG_XMON) || defined(CONFIG_KGDB)
 	if (debugger_fault_handler && regs->trap == 0x300) {
 		debugger_fault_handler(regs);
diff -uNrp 2.4.25-ppc/include/asm-ppc/hw_irq.h 2.4.25-ppc-ipipe/include/asm-ppc/hw_irq.h
--- 2.4.25-ppc/include/asm-ppc/hw_irq.h	2003-10-30 01:34:05.000000000 +0100
+++ 2.4.25-ppc-ipipe/include/asm-ppc/hw_irq.h	2006-01-30 16:06:18.000000000 +0100
@@ -10,6 +10,60 @@ extern unsigned long do_IRQ_intercept;
 extern int timer_interrupt(struct pt_regs *);
 extern void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);