default.cfg.bck

用verilog语言编的正弦波发生器

# Virsim Configuration File
version "2.2.0"

# Files Open:
#   Designator  Sources  Filename
#   ----------  -------  --------
#       V1         y     vcdplus.vpd

define exprgroup EGroup0;

define linkwindow A
	time 0 "10 ps",
	exprgroup "EGroup0";

define group "AutoGroup0"
	verticalposition 1,
	add "V1" "sinetest.nrst" "strength" 1 ,
	add "V1" "sinetest.clk" "strength" 1 ,
	add "V1" "sinetest.dat" "hex" 1 ,
	add "V1" "sinetest.gen.quad" "hex" 1 ,
	add "V1" "sinetest.gen.addr" "unsigned" 1 ,
	add " " "  " "blank" 1 ,
	add "V1" "sinetest.gen.dout" "hex" 16 stair;

define wave
	xposition 7,
	yposition 68,
	width 1016,
	height 634,
	linkwindow A,
	displayinfo 0 "10 ps" tpp 49 0,
	group "AutoGroup0",
	pane1 80,
	pane2 58;

define hierarchy
	xposition 710,
	yposition -1,
	width 313,
	height 780,
	designator "V1",
	layout "default",
	topscope "<root>",
	pane1 148,
	focusscope "sinetest",
	pane2 0,
	locate "scopes",
	find "selected",
	findtext "*",
	pane3 276,
	signals on,
	ports on,
	constants off,
	variables off,
	generics off,
	filtertext "*",
	signalscope "sinetest.gen";