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📄 2s60_fft_acceleration.qsf

📁 在stratix里实现快速傅立叶变换的具体源码
💻 QSF
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# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		2s60_fft_acceleration_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Stratix II"
set_global_assignment -name DEVICE EP2S60F672C5
set_global_assignment -name TOP_LEVEL_ENTITY 2s60_fft_acceleration
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:29:09  OCTOBER 20, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 6.0
set_global_assignment -name BDF_FILE 2s60_fft_acceleration.bdf
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON
set_global_assignment -name ADV_NETLIST_OPT_SYNTH_GATE_RETIME ON
set_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name MUX_RESTRUCTURE OFF
set_global_assignment -name STATE_MACHINE_PROCESSING "ONE-HOT"
set_location_assignment PIN_AD4 -to zs_addr_from_the_sdram[0]
set_location_assignment PIN_AD3 -to zs_addr_from_the_sdram[1]
set_location_assignment PIN_AD5 -to zs_addr_from_the_sdram[2]
set_location_assignment PIN_W9 -to zs_addr_from_the_sdram[3]
set_location_assignment PIN_W10 -to zs_addr_from_the_sdram[4]
set_location_assignment PIN_AB10 -to zs_addr_from_the_sdram[5]
set_location_assignment PIN_AF5 -to zs_addr_from_the_sdram[6]
set_location_assignment PIN_AE5 -to zs_addr_from_the_sdram[7]
set_location_assignment PIN_AC6 -to zs_addr_from_the_sdram[8]
set_location_assignment PIN_AF6 -to zs_addr_from_the_sdram[9]
set_location_assignment PIN_AA10 -to zs_addr_from_the_sdram[10]
set_location_assignment PIN_Y9 -to zs_addr_from_the_sdram[11]
set_location_assignment PIN_AE23 -to zs_ba_from_the_sdram[0]
set_location_assignment PIN_AD23 -to zs_ba_from_the_sdram[1]
set_location_assignment PIN_AE16 -to zs_cas_n_from_the_sdram
set_location_assignment PIN_AE20 -to zs_cke_from_the_sdram
set_location_assignment PIN_AE19 -to zs_cs_n_from_the_sdram
set_location_assignment PIN_W15 -to zs_dq_to_and_from_the_sdram[0]
set_location_assignment PIN_V14 -to zs_dq_to_and_from_the_sdram[1]
set_location_assignment PIN_AA16 -to zs_dq_to_and_from_the_sdram[2]
set_location_assignment PIN_AD16 -to zs_dq_to_and_from_the_sdram[3]
set_location_assignment PIN_AF17 -to zs_dq_to_and_from_the_sdram[4]
set_location_assignment PIN_AD17 -to zs_dq_to_and_from_the_sdram[5]
set_location_assignment PIN_AF18 -to zs_dq_to_and_from_the_sdram[6]
set_location_assignment PIN_AA17 -to zs_dq_to_and_from_the_sdram[7]
set_location_assignment PIN_V16 -to zs_dq_to_and_from_the_sdram[8]
set_location_assignment PIN_AB17 -to zs_dq_to_and_from_the_sdram[9]
set_location_assignment PIN_AF19 -to zs_dq_to_and_from_the_sdram[10]
set_location_assignment PIN_AD18 -to zs_dq_to_and_from_the_sdram[11]
set_location_assignment PIN_AD19 -to zs_dq_to_and_from_the_sdram[12]
set_location_assignment PIN_AF20 -to zs_dq_to_and_from_the_sdram[13]
set_location_assignment PIN_AC17 -to zs_dq_to_and_from_the_sdram[14]
set_location_assignment PIN_V17 -to zs_dq_to_and_from_the_sdram[15]
set_location_assignment PIN_AB18 -to zs_dq_to_and_from_the_sdram[16]
set_location_assignment PIN_AF21 -to zs_dq_to_and_from_the_sdram[17]
set_location_assignment PIN_AD20 -to zs_dq_to_and_from_the_sdram[18]
set_location_assignment PIN_AD21 -to zs_dq_to_and_from_the_sdram[19]
set_location_assignment PIN_AF22 -to zs_dq_to_and_from_the_sdram[20]
set_location_assignment PIN_AC18 -to zs_dq_to_and_from_the_sdram[21]
set_location_assignment PIN_W18 -to zs_dq_to_and_from_the_sdram[22]
set_location_assignment PIN_AB19 -to zs_dq_to_and_from_the_sdram[23]
set_location_assignment PIN_AD22 -to zs_dq_to_and_from_the_sdram[24]
set_location_assignment PIN_AE22 -to zs_dq_to_and_from_the_sdram[25]
set_location_assignment PIN_AF24 -to zs_dq_to_and_from_the_sdram[26]
set_location_assignment PIN_AE24 -to zs_dq_to_and_from_the_sdram[27]
set_location_assignment PIN_AB7 -to zs_dq_to_and_from_the_sdram[28]
set_location_assignment PIN_V10 -to zs_dq_to_and_from_the_sdram[29]
set_location_assignment PIN_AA8 -to zs_dq_to_and_from_the_sdram[30]
set_location_assignment PIN_AF3 -to zs_dq_to_and_from_the_sdram[31]
set_location_assignment PIN_AF7 -to zs_dqm_from_the_sdram[0]
set_location_assignment PIN_AD7 -to zs_dqm_from_the_sdram[1]
set_location_assignment PIN_AC7 -to zs_dqm_from_the_sdram[2]
set_location_assignment PIN_AF8 -to zs_dqm_from_the_sdram[3]
set_location_assignment PIN_AE17 -to zs_ras_n_from_the_sdram
set_location_assignment PIN_AE18 -to zs_we_n_from_the_sdram
set_location_assignment PIN_AF15 -to extclk
set_location_assignment PIN_AA15 -to reset
set_location_assignment PIN_B13 -to externalclk
set_location_assignment PIN_AF12 -to sdramclk
set_location_assignment PIN_AA15 -to reset_n
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL
set_global_assignment -name SEED 1
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name ADV_NETLIST_OPT_RETIME_CORE_AND_IO ON
set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS OFF
set_global_assignment -name MIF_FILE temp.mif
set_global_assignment -name HEX_FILE CosRAM.hex
set_global_assignment -name HEX_FILE SinRAM.hex

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