ds1631control.v

一个完整的通过IIC总线控制Dallas公司的温度传感芯片DS1631采集温度数据的Verilog代码

							if(phase3)
								inner_state<=fourth;							
						 end
						fourth: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readMSData_reg[7:1]<=readMSData_reg[6:0];
								readMSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=fifth;							
						 end
						fifth: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readMSData_reg[7:1]<=readMSData_reg[6:0];
								readMSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=sixth;							
						 end
						sixth: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readMSData_reg[7:1]<=readMSData_reg[6:0];
								readMSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=seventh;								
						 end
						seventh: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readMSData_reg[7:1]<=readMSData_reg[6:0];
								readMSData_reg[0]<=SDA;
							 end
							if(phase3)begin
								inner_state<=eighth;
							end								
						 end
						eighth: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readMSData_reg[7:1]<=readMSData_reg[6:0];
								readMSData_reg[0]<=SDA;
							 end
							if(phase3)begin
							    link<=1;
								sda_buf<=0;	 //配置返回芯片的应答，ACK=0
								inner_state<=ack;
							end										
						 end						
						ack: begin																					
							if(phase3)begin								
								link<=0;															
								inner_state<=first;
								i2c_state<=read_ls_data;
							end	
							
						 end
					 endcase
				 end
				/*****读低8位数据输入*****/
				read_ls_data: begin  
					case(inner_state)
						//从芯片读取低8位数据
						first: begin
							if(phase0)							
								sda_buf<=SDA;
							if(phase1) begin
								readLSData_reg[7:1]<=readLSData_reg[6:0];
								readLSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=second;
						 end
						second: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readLSData_reg[7:1]<=readLSData_reg[6:0];
								readLSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=third;
						 end
						third: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readLSData_reg[7:1]<=readLSData_reg[6:0];
								readLSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=fourth;							
						 end
						fourth: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readLSData_reg[7:1]<=readLSData_reg[6:0];
								readLSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=fifth;							
						 end
						fifth: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readLSData_reg[7:1]<=readLSData_reg[6:0];
								readLSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=sixth;							
						 end
						sixth: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readLSData_reg[7:1]<=readLSData_reg[6:0];
								readLSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=seventh;								
						 end
						seventh: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readLSData_reg[7:1]<=readLSData_reg[6:0];
								readLSData_reg[0]<=SDA;
							 end
							if(phase3)
								inner_state<=eighth;								
						 end
						eighth: begin
							if(phase0)
								sda_buf<=SDA;
							if(phase1) begin
								readLSData_reg[7:1]<=readLSData_reg[6:0];
								readLSData_reg[0]<=SDA;
							 end
							if(phase3) 							 
								inner_state<=ack;
						 end
						//配置返回芯片的应答，ACK
						ack: begin
							if(phase3) begin
								link<=1;
								sda_buf<=0; //应答=0
								inner_state<=stop;
							 end
						 end
						//配置停止，P=1
						stop: begin
							if(phase1) 
								sda_buf<=1;
							if(phase3) 
								main_state<=2'b00;
						 end
					endcase
				end
			 endcase
		end
	 endcase
 end
end
		

				
/////////////////////数码管显示部分/////////////////					
always@(posedge clk or negedge rst)
begin
	if(!rst) begin //如果复位
		 cnt_scan<=0;
		 SegEn<=8'b1111_1110;  //只剩最后一个数码管显示0
	 end
	else begin
		cnt_scan<=cnt_scan+1;
		if(cnt_scan==16'hffff) begin 
			SegEn[7:1]<=SegEn[6:0];
			SegEn[0]<=SegEn[7];
		 end
	 end
end

//二进制变十进制,自己想的笨办法
always@(*)
begin
	if(readMSData_reg>=100)begin
		baiwei=1;
		if(readMSData_reg<110)begin		
			shiwei=0;
			gewei=readMSData_reg-100;
		end
		if(readMSData_reg>=110 && readMSData_reg<120)begin		
			shiwei=1;
			gewei=readMSData_reg-110;
		end
		if(readMSData_reg>=120)begin		
			shiwei=2;
			gewei=readMSData_reg-120;
		end
	end
	else begin
		baiwei=0;
		if(readMSData_reg>=90)begin		
			shiwei=9;
			gewei=readMSData_reg-90;
		end
		if(readMSData_reg>=80 && readMSData_reg<90)begin		
			shiwei=8;
			gewei=readMSData_reg-80;
		end
		if(readMSData_reg>=70 && readMSData_reg<80)begin		
			shiwei=7;
			gewei=readMSData_reg-70;
		end
		if(readMSData_reg>=60 && readMSData_reg<70)begin		
			shiwei=6;
			gewei=readMSData_reg-60;
		end
		if(readMSData_reg>=50 && readMSData_reg<60)begin		
			shiwei=5;
			gewei=readMSData_reg-50;
		end
		if(readMSData_reg>=40 && readMSData_reg<50)begin		
			shiwei=4;
			gewei=readMSData_reg-40;
		end
		if(readMSData_reg>=30 && readMSData_reg<40)begin		
			shiwei=3;
			gewei=readMSData_reg-30;
		end
		if(readMSData_reg>=20 && readMSData_reg<30)begin		
			shiwei=2;
			gewei=readMSData_reg-20;
		end
		if(readMSData_reg>=10 && readMSData_reg<20)begin		
			shiwei=1;
			gewei=readMSData_reg-10;
		end
		if(readMSData_reg>=0 && readMSData_reg<10)begin		
			shiwei=0;
			gewei=readMSData_reg-0;
		end
	end
	if(readLSData_reg =='h10)begin
		xiao1=0;
		xiao2=6;
		xiao3=2;
		xiao4=5;
	end
	if(readLSData_reg =='h20)begin
		xiao1=1;
		xiao2=2;
		xiao3=5;
		xiao4=0;
	end
	if(readLSData_reg =='h30)begin
		xiao1=1;
		xiao2=8;
		xiao3=7;
		xiao4=5;
	end
	if(readLSData_reg =='h40)begin
		xiao1=2;
		xiao2=5;
		xiao3=0;
		xiao4=0;
	end
	if(readLSData_reg =='h50)begin
		xiao1=3;
		xiao2=1;
		xiao3=2;
		xiao4=5;
	end
	if(readLSData_reg =='h60)begin
		xiao1=3;
		xiao2=7;
		xiao3=5;
		xiao4=0;
	end
	if(readLSData_reg =='h70)begin
		xiao1=4;
		xiao2=3;
		xiao3=7;
		xiao4=5;
	end
	if(readLSData_reg =='h80)begin
		xiao1=5;
		xiao2=0;
		xiao3=0;
		xiao4=0;
	end
	if(readLSData_reg =='h90)begin
		xiao1=5;
		xiao2=6;
		xiao3=2;
		xiao4=5;
	end
	if(readLSData_reg =='hA0)begin
		xiao1=6;
		xiao2=2;
		xiao3=5;
		xiao4=0;
	end
	if(readLSData_reg =='hB0)begin
		xiao1=6;
		xiao2=8;
		xiao3=7;
		xiao4=5;
	end
	if(readLSData_reg =='hC0)begin
		xiao1=7;
		xiao2=5;
		xiao3=0;
		xiao4=0;
	end
	if(readLSData_reg =='hD0)begin
		xiao1=8;
		xiao2=1;
		xiao3=2;
		xiao4=5;
	end
	if(readLSData_reg =='hE0)begin
		xiao1=8;
		xiao2=7;
		xiao3=5;
		xiao4=0;
	end
	if(readLSData_reg =='hF0)begin
		xiao1=9;
		xiao2=3;
		xiao3=7;
		xiao4=5;
	end
end


always@(*)
begin
	case(SegEn)
		8'b1111_1110:  //第8号数码管显示小数点后第4位
			dataout_code=xiao4;
			//dataout_code=readLSData_reg[3:0];
		8'b1111_1101:  //第7号数码管显示小数点后第3位
			dataout_code=xiao3;
			//dataout_code=readLSData_reg[7:4];
		8'b1111_1011:  //第6号数码管显示小数点后第2位
			dataout_code=xiao2;
			//dataout_code=readMSData_reg[3:0];
		8'b1111_0111:  //第5号数码管显示小数点后第1位
			dataout_code=xiao1;   
		8'b1110_1111:  //第4号数码管显示小数点
			dataout_code=15;
		8'b1101_1111:  //第3号数码管显示个位
			dataout_code=gewei;
			//dataout_code=readLSData_reg[7:4];
		8'b1011_1111:  //第2号数码管显示十位
			dataout_code=shiwei;
			//dataout_code=readMSData_reg[3:0];
		8'b0111_1111:  //第1号数码管显示百位
			dataout_code=baiwei;
			//dataout_code=readMSData_reg[7:4];		
		default:
			dataout_code=0;
	 endcase
end


//数码管译码
always@(dataout_code)
begin	
	case(dataout_code)
		4'b0000:
			SegData=8'b0000_0011;
		4'b0001:
			SegData=8'b1001_1111;
		4'b0010:
			SegData=8'b0010_0101;
		4'b0011:
			SegData=8'b0000_1101;
		4'b0100:
			SegData=8'b1001_1001;
		4'b0101:
			SegData=8'b0100_1001;
		4'b0110:
			SegData=8'b0100_0001;
		4'b0111:
			SegData=8'b0001_1111;
		4'b1000:
			SegData=8'b0000_0001;
		4'b1001:
			SegData=8'b0001_1001;
		4'b1010:
			SegData=8'b0001_0001;
		4'b1011:
			SegData=8'b1100_0001;
		4'b1100:
			SegData=8'b0110_0011;
		4'b1101:
			SegData=8'b1000_0101;
		4'b1110:
			SegData=8'b0110_0001;
		4'b1111:
			SegData=8'b1111_1110;
	 endcase
end
endmodule