ad9851.qsf

用VHDL语言编写的DDS正弦函数发生器

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		AD9851_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE EP1C3T144C8
set_global_assignment -name TOP_LEVEL_ENTITY SYS_TOP
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:41:27  JULY 24, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 6.0
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name VHDL_FILE AD9851.vhd
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_location_assignment PIN_53 -to DAT_OUT[0]
set_location_assignment PIN_51 -to DAT_OUT[1]
set_location_assignment PIN_56 -to DAT_OUT[2]
set_location_assignment PIN_50 -to DAT_OUT[3]
set_location_assignment PIN_57 -to DAT_OUT[4]
set_location_assignment PIN_49 -to DAT_OUT[5]
set_location_assignment PIN_58 -to DAT_OUT[6]
set_location_assignment PIN_48 -to DAT_OUT[7]
set_location_assignment PIN_52 -to FQ_UD
set_location_assignment PIN_28 -to MCU_CLK
set_location_assignment PIN_60 -to REST
set_location_assignment PIN_59 -to W_CLK
set_location_assignment PIN_93 -to SYS_CLK
set_location_assignment PIN_10 -to DAT_IN[0]
set_location_assignment PIN_7 -to DAT_IN[1]
set_location_assignment PIN_6 -to DAT_IN[2]
set_location_assignment PIN_5 -to DAT_IN[3]
set_location_assignment PIN_4 -to DAT_IN[4]
set_location_assignment PIN_3 -to DAT_IN[5]
set_location_assignment PIN_2 -to DAT_IN[6]
set_location_assignment PIN_1 -to DAT_IN[7]
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name FMAX_REQUIREMENT "50 MHz" -section_id CLOCK
set_location_assignment PIN_16 -to FLAG
set_global_assignment -name VHDL_FILE TLC5510.vhd
set_global_assignment -name BDF_FILE SYS_TOP.bdf
set_instance_assignment -name CLOCK_SETTINGS CLOCK -to SYS_CLK
set_global_assignment -name VHDL_FILE JUDGE.vhd
set_location_assignment PIN_122 -to TCL_CLK
set_location_assignment PIN_109 -to TCL_OE
set_location_assignment PIN_121 -to TLC_DAT[7]
set_location_assignment PIN_120 -to TLC_DAT[6]
set_location_assignment PIN_119 -to TLC_DAT[5]
set_location_assignment PIN_114 -to TLC_DAT[4]
set_location_assignment PIN_113 -to TLC_DAT[3]
set_location_assignment PIN_112 -to TLC_DAT[2]
set_location_assignment PIN_111 -to TLC_DAT[1]
set_location_assignment PIN_110 -to TLC_DAT[0]
set_location_assignment PIN_27 -to FM_EN
set_location_assignment PIN_26 -to MPF[1]
set_location_assignment PIN_17 -to MPF[0]