_primary.vhd

来自「verilog源代码」· VHDL 代码 · 共 12 行

library verilog;
use verilog.vl_types.all;
entity ColorBar is
    port(
        rst             : in     vl_logic;
        clk             : in     vl_logic;
        VGA_HS          : out    vl_logic;
        VGA_VS          : out    vl_logic;
        VGA_RGB         : out    vl_logic_vector(2 downto 0)
    );
end ColorBar;