cam.map.eqn

用VHDL编写的程序

A1L731 = \main:data[0][0] & A1L411 & A1L511;


--A1L241 is rtl~477
--operation mode is normal

A1L241 = (A1L59 & (!A1L731) # !A1L59 & !\main:data[1][0] # !A1L231) & CASCADE(A1L441);


--\main:tag[0][5] is \main:tag[0][5]
--operation mode is normal

\main:tag[0][5]_lut_out = ctlTagIn[5];
\main:tag[0][5] = DFFE(\main:tag[0][5]_lut_out, clk, !rst, , A1L61);


--\main:tag[0][0] is \main:tag[0][0]
--operation mode is normal

\main:tag[0][0]_lut_out = ctlTagIn[0];
\main:tag[0][0] = DFFE(\main:tag[0][0]_lut_out, clk, !rst, , A1L61);


--A1L601 is reduce_nor~479
--operation mode is normal

A1L601 = tagin[0] & \main:tag[0][0] & (tagin[5] $ !\main:tag[0][5]) # !tagin[0] & !\main:tag[0][0] & (tagin[5] $ !\main:tag[0][5]);

--A1L221 is reduce_nor~523
--operation mode is normal

A1L221 = tagin[0] & \main:tag[0][0] & (tagin[5] $ !\main:tag[0][5]) # !tagin[0] & !\main:tag[0][0] & (tagin[5] $ !\main:tag[0][5]);


--\main:tag[0][7] is \main:tag[0][7]
--operation mode is normal

\main:tag[0][7]_lut_out = ctlTagIn[7];
\main:tag[0][7] = DFFE(\main:tag[0][7]_lut_out, clk, !rst, , A1L61);


--\main:tag[0][1] is \main:tag[0][1]
--operation mode is normal

\main:tag[0][1]_lut_out = ctlTagIn[1];
\main:tag[0][1] = DFFE(\main:tag[0][1]_lut_out, clk, !rst, , A1L61);


--A1L411 is reduce_nor~507
--operation mode is normal

A1L411 = (tagin[1] & \main:tag[0][1] & (tagin[7] $ !\main:tag[0][7]) # !tagin[1] & !\main:tag[0][1] & (tagin[7] $ !\main:tag[0][7])) & CASCADE(A1L221);


--\main:tag[0][2] is \main:tag[0][2]
--operation mode is normal

\main:tag[0][2]_lut_out = ctlTagIn[2];
\main:tag[0][2] = DFFE(\main:tag[0][2]_lut_out, clk, !rst, , A1L61);


--\main:tag[0][6] is \main:tag[0][6]
--operation mode is normal

\main:tag[0][6]_lut_out = ctlTagIn[6];
\main:tag[0][6] = DFFE(\main:tag[0][6]_lut_out, clk, !rst, , A1L61);


--A1L701 is reduce_nor~481
--operation mode is normal

A1L701 = tagin[6] & \main:tag[0][6] & (tagin[2] $ !\main:tag[0][2]) # !tagin[6] & !\main:tag[0][6] & (tagin[2] $ !\main:tag[0][2]);

--A1L321 is reduce_nor~524
--operation mode is normal

A1L321 = tagin[6] & \main:tag[0][6] & (tagin[2] $ !\main:tag[0][2]) # !tagin[6] & !\main:tag[0][6] & (tagin[2] $ !\main:tag[0][2]);


--\main:tag[0][4] is \main:tag[0][4]
--operation mode is normal

\main:tag[0][4]_lut_out = ctlTagIn[4];
\main:tag[0][4] = DFFE(\main:tag[0][4]_lut_out, clk, !rst, , A1L61);


--\main:tag[0][3] is \main:tag[0][3]
--operation mode is normal

\main:tag[0][3]_lut_out = ctlTagIn[3];
\main:tag[0][3] = DFFE(\main:tag[0][3]_lut_out, clk, !rst, , A1L61);


--A1L511 is reduce_nor~508
--operation mode is normal

A1L511 = (tagin[3] & \main:tag[0][3] & (tagin[4] $ !\main:tag[0][4]) # !tagin[3] & !\main:tag[0][3] & (tagin[4] $ !\main:tag[0][4])) & CASCADE(A1L321);


--A1L43 is \main:tag[2][0]~12
--operation mode is normal

A1L43 = A1L55 & count[1] & (!count[0]);


--A1L801 is reduce_nor~495
--operation mode is normal

A1L801 = tagin[0] & \main:tag[2][0] & (tagin[5] $ !\main:tag[2][5]) # !tagin[0] & !\main:tag[2][0] & (tagin[5] $ !\main:tag[2][5]);

--A1L421 is reduce_nor~525
--operation mode is normal

A1L421 = tagin[0] & \main:tag[2][0] & (tagin[5] $ !\main:tag[2][5]) # !tagin[0] & !\main:tag[2][0] & (tagin[5] $ !\main:tag[2][5]);


--A1L611 is reduce_nor~509
--operation mode is normal

A1L611 = (tagin[1] & \main:tag[2][1] & (tagin[7] $ !\main:tag[2][7]) # !tagin[1] & !\main:tag[2][1] & (tagin[7] $ !\main:tag[2][7])) & CASCADE(A1L421);


--A1L901 is reduce_nor~497
--operation mode is normal

A1L901 = tagin[6] & \main:tag[2][6] & (tagin[2] $ !\main:tag[2][2]) # !tagin[6] & !\main:tag[2][6] & (tagin[2] $ !\main:tag[2][2]);

--A1L521 is reduce_nor~526
--operation mode is normal

A1L521 = tagin[6] & \main:tag[2][6] & (tagin[2] $ !\main:tag[2][2]) # !tagin[6] & !\main:tag[2][6] & (tagin[2] $ !\main:tag[2][2]);


--A1L711 is reduce_nor~510
--operation mode is normal

A1L711 = (tagin[3] & \main:tag[2][3] & (tagin[4] $ !\main:tag[2][4]) # !tagin[3] & !\main:tag[2][3] & (tagin[4] $ !\main:tag[2][4])) & CASCADE(A1L521);


--\main:data[1][1] is \main:data[1][1]
--operation mode is normal

\main:data[1][1]_lut_out = A1L001 & (A1L57 & datain[1] # !A1L57 & (\main:data[1][1])) # !A1L001 & datain[1];
\main:data[1][1] = DFFE(\main:data[1][1]_lut_out, clk, !rst, , A1L2);


--\main:data[2][1] is \main:data[2][1]
--operation mode is normal

\main:data[2][1]_lut_out = A1L501 & (A1L77 & datain[1] # !A1L77 & (\main:data[2][1])) # !A1L501 & datain[1];
\main:data[2][1] = DFFE(\main:data[2][1]_lut_out, clk, !rst, , A1L2);


--\main:data[3][1] is \main:data[3][1]
--operation mode is normal

\main:data[3][1]_lut_out = datain[1];
\main:data[3][1] = DFFE(\main:data[3][1]_lut_out, clk, !rst, , A1L11);


--A1L831 is rtl~471
--operation mode is normal

A1L831 = A1L531 & (\main:data[2][1] # \main:data[3][1] & !A1L09) # !A1L531 & (\main:data[3][1] & !A1L09);


--A1L931 is rtl~472
--operation mode is normal

A1L931 = !A1L831 & (A1L59 # !\main:data[1][1] # !A1L231);

--A1L541 is rtl~482
--operation mode is normal

A1L541 = !A1L831 & (A1L59 # !\main:data[1][1] # !A1L231);


--\main:data[0][1] is \main:data[0][1]
--operation mode is normal

\main:data[0][1]_lut_out = A1L67 & \main:data[0][1] # !A1L67 & (datain[1]);
\main:data[0][1] = DFFE(\main:data[0][1]_lut_out, clk, !rst, , A1L2);


--A1L041 is rtl~473
--operation mode is normal

A1L041 = A1L411 & A1L511 & A1L09 & \main:data[0][1];


--A1L141 is rtl~474
--operation mode is normal

A1L141 = A1L041 # \main:data[3][1] & (!A1L511 # !A1L411);


--A1L341 is rtl~478
--operation mode is normal

A1L341 = (A1L611 & A1L711 # !A1L59 # !A1L141) & CASCADE(A1L541);


--A1L57 is data~762
--operation mode is normal

A1L57 = count[0] & (!A1L87 & !count[1]);


--A1L2 is \main:data[0][0]~29
--operation mode is normal

A1L2 = wr_b & !rd_b & (!A1L51 # !count[2]);


--A1L67 is data~764
--operation mode is normal

A1L67 = A1L87 & (!A1L121 # !A1L021) # !A1L87 & !A1L51 & (!A1L121 # !A1L021);


--A1L77 is data~766
--operation mode is normal

A1L77 = count[1] & (!A1L87 & !count[0]);


--A1L61 is \main:tag[0][0]~15
--operation mode is normal

A1L61 = A1L55 & !count[2] & !count[1] & !count[0];


--A1L011 is reduce_nor~499
--operation mode is normal

A1L011 = \main:tag[3][0] & ctlTagIn[0] & (\main:tag[3][5] $ !ctlTagIn[5]) # !\main:tag[3][0] & !ctlTagIn[0] & (\main:tag[3][5] $ !ctlTagIn[5]);

--A1L621 is reduce_nor~527
--operation mode is normal

A1L621 = \main:tag[3][0] & ctlTagIn[0] & (\main:tag[3][5] $ !ctlTagIn[5]) # !\main:tag[3][0] & !ctlTagIn[0] & (\main:tag[3][5] $ !ctlTagIn[5]);


--A1L811 is reduce_nor~511
--operation mode is normal

A1L811 = (\main:tag[3][1] & ctlTagIn[1] & (\main:tag[3][7] $ !ctlTagIn[7]) # !\main:tag[3][1] & !ctlTagIn[1] & (\main:tag[3][7] $ !ctlTagIn[7])) & CASCADE(A1L621);


--A1L111 is reduce_nor~501
--operation mode is normal

A1L111 = \main:tag[3][6] & ctlTagIn[6] & (\main:tag[3][2] $ !ctlTagIn[2]) # !\main:tag[3][6] & !ctlTagIn[6] & (\main:tag[3][2] $ !ctlTagIn[2]);

--A1L721 is reduce_nor~528
--operation mode is normal

A1L721 = \main:tag[3][6] & ctlTagIn[6] & (\main:tag[3][2] $ !ctlTagIn[2]) # !\main:tag[3][6] & !ctlTagIn[6] & (\main:tag[3][2] $ !ctlTagIn[2]);


--A1L911 is reduce_nor~512
--operation mode is normal

A1L911 = (\main:tag[3][3] & ctlTagIn[3] & (\main:tag[3][4] $ !ctlTagIn[4]) # !\main:tag[3][3] & !ctlTagIn[3] & (\main:tag[3][4] $ !ctlTagIn[4])) & CASCADE(A1L721);


--A1L211 is reduce_nor~503
--operation mode is normal

A1L211 = \main:tag[0][0] & ctlTagIn[0] & (\main:tag[0][5] $ !ctlTagIn[5]) # !\main:tag[0][0] & !ctlTagIn[0] & (\main:tag[0][5] $ !ctlTagIn[5]);

--A1L821 is reduce_nor~529
--operation mode is normal

A1L821 = \main:tag[0][0] & ctlTagIn[0] & (\main:tag[0][5] $ !ctlTagIn[5]) # !\main:tag[0][0] & !ctlTagIn[0] & (\main:tag[0][5] $ !ctlTagIn[5]);


--A1L021 is reduce_nor~513
--operation mode is normal

A1L021 = (\main:tag[0][1] & ctlTagIn[1] & (\main:tag[0][7] $ !ctlTagIn[7]) # !\main:tag[0][1] & !ctlTagIn[1] & (\main:tag[0][7] $ !ctlTagIn[7])) & CASCADE(A1L821);


--A1L311 is reduce_nor~505
--operation mode is normal

A1L311 = \main:tag[0][6] & ctlTagIn[6] & (\main:tag[0][2] $ !ctlTagIn[2]) # !\main:tag[0][6] & !ctlTagIn[6] & (\main:tag[0][2] $ !ctlTagIn[2]);

--A1L921 is reduce_nor~530
--operation mode is normal

A1L921 = \main:tag[0][6] & ctlTagIn[6] & (\main:tag[0][2] $ !ctlTagIn[2]) # !\main:tag[0][6] & !ctlTagIn[6] & (\main:tag[0][2] $ !ctlTagIn[2]);


--A1L121 is reduce_nor~514
--operation mode is normal

A1L121 = (\main:tag[0][3] & ctlTagIn[3] & (\main:tag[0][4] $ !ctlTagIn[4]) # !\main:tag[0][3] & !ctlTagIn[3] & (\main:tag[0][4] $ !ctlTagIn[4])) & CASCADE(A1L921);


--A1L01 is \main:data[3][0]~46
--operation mode is normal

A1L01 = A1L811 & (A1L911 # A1L9 & A1L75) # !A1L811 & A1L9 & A1L75;

--A1L21 is \main:data[3][0]~50
--operation mode is normal

A1L21 = A1L811 & (A1L911 # A1L9 & A1L75) # !A1L811 & A1L9 & A1L75;


--A1L11 is \main:data[3][0]~48
--operation mode is normal

A1L11 = (wr_b & !rd_b & (!A1L51 # !count[2])) & CASCADE(A1L21);


--clk is clk
--operation mode is input

clk = INPUT();


--tagin[1] is tagin[1]
--operation mode is input

tagin[1] = INPUT();


--tagin[7] is tagin[7]
--operation mode is input

tagin[7] = INPUT();


--tagin[0] is tagin[0]
--operation mode is input

tagin[0] = INPUT();


--tagin[5] is tagin[5]
--operation mode is input

tagin[5] = INPUT();


--tagin[3] is tagin[3]
--operation mode is input

tagin[3] = INPUT();


--tagin[4] is tagin[4]
--operation mode is input

tagin[4] = INPUT();


--tagin[6] is tagin[6]
--operation mode is input

tagin[6] = INPUT();


--tagin[2] is tagin[2]
--operation mode is input

tagin[2] = INPUT();


--rd_b is rd_b
--operation mode is input

rd_b = INPUT();


--rst is rst
--operation mode is input

rst = INPUT();


--wr_b is wr_b
--operation mode is input

wr_b = INPUT();


--ctlTagIn[1] is ctlTagIn[1]
--operation mode is input

ctlTagIn[1] = INPUT();


--ctlTagIn[7] is ctlTagIn[7]
--operation mode is input

ctlTagIn[7] = INPUT();


--ctlTagIn[0] is ctlTagIn[0]
--operation mode is input

ctlTagIn[0] = INPUT();


--ctlTagIn[5] is ctlTagIn[5]
--operation mode is input

ctlTagIn[5] = INPUT();


--ctlTagIn[3] is ctlTagIn[3]
--operation mode is input

ctlTagIn[3] = INPUT();


--ctlTagIn[4] is ctlTagIn[4]
--operation mode is input

ctlTagIn[4] = INPUT();


--ctlTagIn[6] is ctlTagIn[6]
--operation mode is input

ctlTagIn[6] = INPUT();


--ctlTagIn[2] is ctlTagIn[2]
--operation mode is input

ctlTagIn[2] = INPUT();


--datain[0] is datain[0]
--operation mode is input

datain[0] = INPUT();


--datain[1] is datain[1]
--operation mode is input

datain[1] = INPUT();


--data_out[0] is data_out[0]
--operation mode is output

data_out[0] = OUTPUT(A1L96Q);


--data_out[1] is data_out[1]
--operation mode is output

data_out[1] = OUTPUT(A1L17Q);


--full is full
--operation mode is output

full = OUTPUT(A1L18Q);


--hit is hit
--operation mode is output

hit = OUTPUT(A1L38Q);