📄 de2_default.map.rpt
字号:
; Analysis & Synthesis Source Files Read ;
+----------------------------------+-----------------+------------------------------+-------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
+----------------------------------+-----------------+------------------------------+-------------------------------------------------------------------+
; VGA_Controller/Img_RAM.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/VGA_Controller/Img_RAM.v ;
; VGA_Controller/VGA_Controller.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/VGA_Controller/VGA_Controller.v ;
; VGA_Controller/VGA_OSD_RAM.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/VGA_Controller/VGA_OSD_RAM.v ;
; VGA_Controller/VGA_Param.h ; yes ; User File ; E:/zhangwei/fpga_pro/DE2_Default/VGA_Controller/VGA_Param.h ;
; AUDIO_DAC.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/AUDIO_DAC.v ;
; DE2_Default.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/DE2_Default.v ;
; I2C_AV_Config.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/I2C_AV_Config.v ;
; I2C_Controller.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/I2C_Controller.v ;
; LCD_Controller.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/LCD_Controller.v ;
; LCD_TEST.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/LCD_TEST.v ;
; Reset_Delay.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/Reset_Delay.v ;
; SEG7_LUT.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/SEG7_LUT.v ;
; SEG7_LUT_8.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/SEG7_LUT_8.v ;
; VGA_Audio_PLL.v ; yes ; User Verilog HDL File ; E:/zhangwei/fpga_pro/DE2_Default/VGA_Audio_PLL.v ;
; altpll.tdf ; yes ; Megafunction ; c:/altera/quartus50/libraries/megafunctions/altpll.tdf ;
; aglobal50.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/aglobal50.inc ;
; stratix_pll.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/stratix_pll.inc ;
; stratixii_pll.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/stratixii_pll.inc ;
; cycloneii_pll.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/cycloneii_pll.inc ;
; altsyncram.tdf ; yes ; Megafunction ; c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf ;
; stratix_ram_block.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/stratix_ram_block.inc ;
; lpm_mux.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/lpm_mux.inc ;
; lpm_decode.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/lpm_decode.inc ;
; altsyncram.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/altsyncram.inc ;
; a_rdenreg.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/a_rdenreg.inc ;
; altrom.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/altrom.inc ;
; altram.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/altram.inc ;
; altdpram.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/altdpram.inc ;
; altqpram.inc ; yes ; Other ; c:/altera/quartus50/libraries/megafunctions/altqpram.inc ;
; db/altsyncram_e3f1.tdf ; yes ; Auto-Generated Megafunction ; E:/zhangwei/fpga_pro/DE2_Default/db/altsyncram_e3f1.tdf ;
; db/altsyncram_8en1.tdf ; yes ; Auto-Generated Megafunction ; E:/zhangwei/fpga_pro/DE2_Default/db/altsyncram_8en1.tdf ;
; db/decode_1qa.tdf ; yes ; Auto-Generated Megafunction ; E:/zhangwei/fpga_pro/DE2_Default/db/decode_1qa.tdf ;
; db/mux_hkb.tdf ; yes ; Auto-Generated Megafunction ; E:/zhangwei/fpga_pro/DE2_Default/db/mux_hkb.tdf ;
; db/mux_akb.tdf ; yes ; Auto-Generated Megafunction ; E:/zhangwei/fpga_pro/DE2_Default/db/mux_akb.tdf ;
; db/altsyncram_ekk.tdf ; yes ; Auto-Generated Megafunction ; E:/zhangwei/fpga_pro/DE2_Default/db/altsyncram_ekk.tdf ;
+----------------------------------+-----------------+------------------------------+-------------------------------------------------------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+---------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------+
; Resource ; Usage ;
+---------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------+
; Total combinational functions ; 999 ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 686 ;
; -- 3 input functions ; 83 ;
; -- <=2 input functions ; 230 ;
; -- Combinational cells for routing ; 0 ;
; Logic elements by mode ; ;
; -- normal mode ; 818 ;
; -- arithmetic mode ; 181 ;
; Total registers ; 266 ;
; I/O pins ; 425 ;
; Total memory bits ; 308224 ;
; Total PLLs ; 1 ;
; Maximum fan-out node ; VGA_OSD_RAM:u2|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_e3f1:auto_generated|altsyncram_8en1:altsyncram1|address_reg_a[8] ;
; Maximum fan-out ; 242 ;
; Total fan-out ; 5555 ;
; Average fan-out ; 3.12 ;
+---------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+----------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ;
+----------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; |DE2_Default ; 999 (29) ; 266 (28) ; 308224 ; 0 ; 0 ; 0 ; 425 ; 0 ; |DE2_Default ;
; |AUDIO_DAC:u4| ; 105 (105) ; 24 (24) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|AUDIO_DAC:u4 ;
; |I2C_AV_Config:u3| ; 92 (38) ; 57 (28) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|I2C_AV_Config:u3 ;
; |I2C_Controller:u0| ; 54 (54) ; 29 (29) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|I2C_AV_Config:u3|I2C_Controller:u0 ;
; |altsyncram:rom_270_rtl_0| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|I2C_AV_Config:u3|altsyncram:rom_270_rtl_0 ;
; |altsyncram_ekk:auto_generated| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|I2C_AV_Config:u3|altsyncram:rom_270_rtl_0|altsyncram_ekk:auto_generated ;
; |LCD_TEST:u5| ; 99 (80) ; 51 (38) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|LCD_TEST:u5 ;
; |LCD_Controller:u0| ; 19 (19) ; 13 (13) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|LCD_TEST:u5|LCD_Controller:u0 ;
; |Reset_Delay:r0| ; 28 (28) ; 21 (21) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|Reset_Delay:r0 ;
; |SEG7_LUT_8:u0| ; 7 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|SEG7_LUT_8:u0 ;
; |SEG7_LUT:u0| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|SEG7_LUT_8:u0|SEG7_LUT:u0 ;
; |VGA_Audio_PLL:p1| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_Audio_PLL:p1 ;
; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_Audio_PLL:p1|altpll:altpll_component ;
; |VGA_Controller:u1| ; 104 (104) ; 63 (63) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_Controller:u1 ;
; |VGA_OSD_RAM:u2| ; 535 (8) ; 22 (8) ; 307200 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_OSD_RAM:u2 ;
; |Img_RAM:u0| ; 527 (0) ; 14 (0) ; 307200 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_OSD_RAM:u2|Img_RAM:u0 ;
; |altsyncram:altsyncram_component| ; 527 (0) ; 14 (0) ; 307200 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_OSD_RAM:u2|Img_RAM:u0|altsyncram:altsyncram_component ;
; |altsyncram_e3f1:auto_generated| ; 527 (0) ; 14 (0) ; 307200 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_OSD_RAM:u2|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_e3f1:auto_generated ;
; |altsyncram_8en1:altsyncram1| ; 527 (0) ; 14 (14) ; 307200 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_OSD_RAM:u2|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_e3f1:auto_generated|altsyncram_8en1:altsyncram1 ;
; |decode_1qa:decode_a| ; 84 (84) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_OSD_RAM:u2|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_e3f1:auto_generated|altsyncram_8en1:altsyncram1|decode_1qa:decode_a ;
; |mux_hkb:mux5| ; 443 (443) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_Default|VGA_OSD_RAM:u2|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_e3f1:auto_generated|altsyncram_8en1:altsyncram1|mux_hkb:mux5 ;
+----------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+---------------------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+--------+----------------------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+---------------------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+--------+----------------------+
; I2C_AV_Config:u3|altsyncram:rom_270_rtl_0|altsyncram_ekk:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; 64 ; 16 ; -- ; -- ; 1024 ; DE2_Default0.rtl.mif ;
; VGA_OSD_RAM:u2|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_e3f1:auto_generated|altsyncram_8en1:altsyncram1|ALTSYNCRAM ; M4K ; True Dual Port ; 38400 ; 8 ; 307200 ; 1 ; 307200 ; Img_DATA.hex ;
+---------------------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+--------+----------------------+
+------------------------------------------------------------------------------------+
; State Machine - |DE2_Default|LCD_TEST:u5|mLCD_ST ;
+----------------+----------------+----------------+----------------+----------------+
; Name ; mLCD_ST.000011 ; mLCD_ST.000001 ; mLCD_ST.000010 ; mLCD_ST.000000 ;
+----------------+----------------+----------------+----------------+----------------+
; mLCD_ST.000000 ; 0 ; 0 ; 0 ; 0 ;
; mLCD_ST.000010 ; 0 ; 0 ; 1 ; 1 ;
; mLCD_ST.000001 ; 0 ; 1 ; 0 ; 1 ;
; mLCD_ST.000011 ; 1 ; 0 ; 0 ; 1 ;
+----------------+----------------+----------------+----------------+----------------+
+---------------------------------------------------------------+
; State Machine - |DE2_Default|LCD_TEST:u5|LCD_Controller:u0|ST ;
+-------+-------+-------+-------+-------------------------------+
; Name ; ST.11 ; ST.01 ; ST.10 ; ST.00 ;
+-------+-------+-------+-------+-------------------------------+
; ST.00 ; 0 ; 0 ; 0 ; 0 ;
; ST.10 ; 0 ; 0 ; 1 ; 1 ;
; ST.01 ; 0 ; 1 ; 0 ; 1 ;
; ST.11 ; 1 ; 0 ; 0 ; 1 ;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -