hdb3.sim.vwf
来自「基于VHDL语言的HDB3码编译码器的设计 HDB3 码的全称是三阶高密度双」· VWF 代码 · 共 201 行
VWF
201 行
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2004 Altera Corporation
Any megafunction design, and related netlist (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only
to program PLD devices (but not masked PLD devices) from Altera. Any
other use of such megafunction design, netlist, support information,
device programming or simulation file, or any other related documentation
or information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to the
intellectual property, including patents, copyrights, trademarks, trade
secrets, or maskworks, embodied in any such megafunction design, netlist,
support information, device programming or simulation file, or any other
related documentation or information provided by Altera or a megafunction
partner, remains with Altera, the megafunction partner, or their respective
licensors. No other licenses, including any licenses needed under any third
party's intellectual property, are provided herein.
*/
HEADER
{
VERSION = 1;
TIME_UNIT = ns;
SIMULATION_TIME = 100000.0;
GRID_PHASE = 0.0;
GRID_PERIOD = 10.0;
GRID_DUTY_CYCLE = 50;
}
SIGNAL("clk")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = INPUT;
PARENT = "";
}
SIGNAL("data_in")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = INPUT;
PARENT = "";
}
SIGNAL("pos_out")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = OUTPUT;
PARENT = "";
}
SIGNAL("neg_out")
{
VALUE_TYPE = NINE_LEVEL_BIT;
SIGNAL_TYPE = SINGLE_BIT;
WIDTH = 1;
LSB_INDEX = -1;
DIRECTION = OUTPUT;
PARENT = "";
}
TRANSITION_LIST("clk")
{
NODE
{
REPEAT = 1;
NODE
{
REPEAT = 500;
LEVEL 0 FOR 100.0;
LEVEL 1 FOR 100.0;
}
}
}
TRANSITION_LIST("data_in")
{
NODE
{
REPEAT = 1;
LEVEL 0 FOR 300.0;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 200.0;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 1005.0;
LEVEL 1 FOR 395.0;
LEVEL 0 FOR 810.0;
LEVEL 1 FOR 390.0;
LEVEL 0 FOR 96500.0;
}
}
TRANSITION_LIST("pos_out")
{
NODE
{
REPEAT = 1;
LEVEL 0 FOR 1506.481;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 1400.0;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 200.0;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 400.0;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 200.0;
NODE
{
REPEAT = 119;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 600.0;
}
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 93.519;
}
}
TRANSITION_LIST("neg_out")
{
NODE
{
REPEAT = 1;
LEVEL 0 FOR 1906.661;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 600.0;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 400.0;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 800.0;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 200.0;
NODE
{
REPEAT = 119;
LEVEL 1 FOR 200.0;
LEVEL 0 FOR 600.0;
}
LEVEL 1 FOR 93.339;
}
}
DISPLAY_LINE
{
CHANNEL = "clk";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 0;
TREE_LEVEL = 0;
}
DISPLAY_LINE
{
CHANNEL = "data_in";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 1;
TREE_LEVEL = 0;
}
DISPLAY_LINE
{
CHANNEL = "pos_out";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 2;
TREE_LEVEL = 0;
}
DISPLAY_LINE
{
CHANNEL = "neg_out";
EXPAND_STATUS = COLLAPSED;
RADIX = Binary;
TREE_INDEX = 3;
TREE_LEVEL = 0;
}
TIME_BAR
{
TIME = 95000;
MASTER = TRUE;
}
;
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