hdb3decoder.vhd

来自「基于VHDL语言的HDB3码编译码器的设计 HDB3 码的全称是三阶高密度双」· VHDL 代码 · 共 79 行

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;

entity HDB3DECODER is
port(POS_IN,NEG_IN: in std_logic;
     CLK,CLR: in std_logic;
     NRZ: out  std_logic);
end ENTITY HDB3DECODER;

ARCHITECTURE ONE of HDB3DECODER is 
   SIGNAL SEQUENCE:               STD_LOGIC_VECTOR(3 DOWNTO 0);   
   SIGNAL POS_FLAG,  NEG_FLAG:    STD_LOGIC;
   SIGNAL POS_IN_TMP,NEG_IN_TMP:  STD_LOGIC;  
BEGIN
P1: PROCESS(CLR,CLK)
    BEGIN
        IF    CLR='0' THEN
              SEQUENCE<="0000";
        ELSIF  CLK'EVENT AND CLK='0' THEN  
              IF  POS_IN_TMP='1' AND NEG_IN_TMP='0'  THEN 
                   IF    SEQUENCE(2 DOWNTO 0)="100"  AND POS_FLAG='1' THEN
                         SEQUENCE<="0000";
                   ELSIF SEQUENCE="1000"  AND POS_FLAG='1'         THEN
                         SEQUENCE(3 DOWNTO 1)<=SEQUENCE(2 DOWNTO 0);
                         SEQUENCE(0)<='0';
                   ELSE  
						 SEQUENCE(3 DOWNTO 1)<=SEQUENCE(2 DOWNTO 0);
                         SEQUENCE(0)<='1';
                   END IF;
              ELSIF  POS_IN_TMP='0' AND   NEG_IN_TMP='1' THEN
                   IF    SEQUENCE(2 DOWNTO 0)="100"  AND NEG_FLAG='1' THEN
                         SEQUENCE<="0000";
                   ELSIF SEQUENCE="1000"  AND NEG_FLAG='1'         THEN                         
                         SEQUENCE<="0000";
                   ELSE  
						 SEQUENCE(3 DOWNTO 1)<=SEQUENCE(2 DOWNTO 0);
                         SEQUENCE(0)<='1';
                   END IF;  
              ELSE 
                    SEQUENCE(3 DOWNTO 1)<=SEQUENCE(2 DOWNTO 0);
                    SEQUENCE(0)<='0'; 
              END IF;
         END IF;
   END PROCESS P1;
P2:PROCESS(CLR,CLK) 
   BEGIN 
       IF CLR='0' THEN 
          POS_IN_TMP<='0';  
          NEG_IN_TMP<='0';
          NRZ<='0';
       ELSIF  CLK'EVENT AND CLK='1'  THEN 
          POS_IN_TMP<=POS_IN;  
          NEG_IN_TMP<=NEG_IN;
          NRZ<=SEQUENCE(3);
       END IF;
   END PROCESS P2;

P3: PROCESS(CLR,CLK) 
   BEGIN 
       IF CLR='0' THEN 
          POS_FLAG<='0';  
          NEG_FLAG<='0';          
       ELSIF  CLK'EVENT AND CLK='0'  THEN 
            IF    POS_IN_TMP='1' AND  NEG_IN_TMP='0'  THEN 
                  POS_FLAG<='1';  
                  NEG_FLAG<='0'; 
            ELSIF POS_IN_TMP='0' AND  NEG_IN_TMP='1'  THEN 
                  POS_FLAG<='0';  
                  NEG_FLAG<='1'; 
            ELSE  
                  NULL;
            END IF;
          
       END IF;
   END PROCESS P3; 
END ONE;