a8251.hif

8251的完整的功能的实现,可以进行编译,综合.

Version 5.0 Build 148 04/26/2005 SJ Full Version
35
1803
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# entity
a8251
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
A8251.vhd
1028800070
4
# storage
db|A8251.(0).cnf
db|A8251.(0).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# entity
dout_mux
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
dout_mux.vhd
1028800084
4
# storage
db|A8251.(1).cnf
db|A8251.(1).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
dout_mux:i_dout_mux
}
# end
# entity
DataLatch
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
data_latch.vhd
1028800086
4
# storage
db|A8251.(2).cnf
db|A8251.(2).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
DataLatch:i_DataSync
}
# end
# entity
AddrLatch
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
addr_latch.vhd
1028800086
4
# storage
db|A8251.(3).cnf
db|A8251.(3).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
AddrLatch:i_AddrSync
}
# end
# entity
Wr_Ext
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
wr_ext.vhd
1028800064
4
# storage
db|A8251.(4).cnf
db|A8251.(4).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
Wr_Ext:i_Wr_Ext
}
# end
# entity
proc
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Proc.vhd
1028800084
4
# storage
db|A8251.(5).cnf
db|A8251.(5).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
proc:i_procintf
}
# end
# entity
proc_cmd_reg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Proc_cmd_reg.vhd
1028800082
4
# storage
db|A8251.(6).cnf
db|A8251.(6).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
proc:i_procintf|proc_cmd_reg:I_proc_cmd_reg
}
# end
# entity
proc_mode_reg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Proc_mode_reg.vhd
1028800082
4
# storage
db|A8251.(7).cnf
db|A8251.(7).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
proc:i_procintf|proc_mode_reg:I_proc_mode_reg
}
# end
# entity
proc_dec
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
PROC_DEC.VHD
1030435392
4
# storage
db|A8251.(8).cnf
db|A8251.(8).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
proc:i_procintf|proc_dec:I_proc_dec
}
# end
# entity
proc_sm
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Proc_sm.vhd
1028800080
4
# storage
db|A8251.(9).cnf
db|A8251.(9).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
proc:i_procintf|proc_sm:I_proc_sm
}
# end
# entity
proc_sync_reg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Proc_sync_reg.vhd
1028800080
4
# storage
db|A8251.(10).cnf
db|A8251.(10).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
proc:i_procintf|proc_sync_reg:I_proc_sync_reg1
proc:i_procintf|proc_sync_reg:I_proc_sync_reg2
}
# end
# entity
rx
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx.vhd
1028800080
4
# storage
db|A8251.(11).cnf
db|A8251.(11).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx
}
# end
# entity
rx_ready_reg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_ready_reg.vhd
1028800074
4
# storage
db|A8251.(12).cnf
db|A8251.(12).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_ready_reg:I_rx_ready_reg
}
# end
# entity
rx_cntrl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_cntrl.vhd
1028800078
4
# storage
db|A8251.(13).cnf
db|A8251.(13).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_cntrl:i_rx_cntrl
}
# end
# entity
rx_cntrl_sm
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_cntrl_sm.vhd
1028800078
4
# storage
db|A8251.(14).cnf
db|A8251.(14).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_cntrl:i_rx_cntrl|rx_cntrl_sm:i_rx_cntrlsm
}
# end
# entity
rx_cntrl_cnt
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_cntrl_cnt.vhd
1028800078
4
# storage
db|A8251.(15).cnf
db|A8251.(15).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_cntrl:i_rx_cntrl|rx_cntrl_cnt:i_rx_cntrl_cnt
}
# end
# entity
rx_det_cntrl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_det_cntrl.vhd
1028800076
4
# storage
db|A8251.(16).cnf
db|A8251.(16).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_det_cntrl:i_rx_det_cntrl
}
# end
# entity
rx_sync_comp
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_sync_comp.vhd
1028800074
4
# storage
db|A8251.(17).cnf
db|A8251.(17).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_sync_comp:i_rx_sync_comp
}
# end
# entity
rx_shift_reg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_shift_reg.vhd
1028800074
4
# storage
db|A8251.(18).cnf
db|A8251.(18).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_shift_reg:i_rx_shift_reg
}
# end
# entity
rx_data_reg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_data_reg.vhd
1028800076
4
# storage
db|A8251.(19).cnf
db|A8251.(19).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_data_reg:i_rx_data_reg
}
# end
# entity
rx_data_cnt
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_data_cnt.vhd
1028800078
4
# storage
db|A8251.(20).cnf
db|A8251.(20).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_data_cnt:i_rx_data_cnt
}
# end
# entity
rx_par_tree
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_par_tree.vhd
1028800076
4
# storage
db|A8251.(21).cnf
db|A8251.(21).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_par_tree:i_rx_par_tree
}
# end
# entity
rx_error_reg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_error_reg.vhd
1028800076
4
# storage
db|A8251.(22).cnf
db|A8251.(22).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_error_reg:i1_rx_error_reg
rx:i_rx|rx_error_reg:i2_rx_error_reg
rx:i_rx|rx_error_reg:i3_rx_error_reg
}
# end
# entity
rx_break_cnt
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_break_cnt.vhd
1028800080
4
# storage
db|A8251.(23).cnf
db|A8251.(23).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_break_cnt:i_rx_break_cnt
}
# end
# entity
rx_sync_stat
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Rx_sync_stat.vhd
1030435426
4
# storage
db|A8251.(24).cnf
db|A8251.(24).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rx:i_rx|rx_sync_stat:i_rx_sync_stat
}
# end
# entity
tx
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx.vhd
1030435448
4
# storage
db|A8251.(25).cnf
db|A8251.(25).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx:i_tx
}
# end
# entity
tx_cntrl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx_cntrl.vhd
1030435512
4
# storage
db|A8251.(26).cnf
db|A8251.(26).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx:i_tx|tx_cntrl:i_tx_cntrl
}
# end
# entity
tx_state_mach
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx_state_mach.vhd
1028800066
4
# storage
db|A8251.(27).cnf
db|A8251.(27).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx:i_tx|tx_cntrl:i_tx_cntrl|tx_state_mach:i_tx_state_mach
}
# end
# entity
tx_data_cnt
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx_data_cnt.vhd
1030435534
4
# storage
db|A8251.(28).cnf
db|A8251.(28).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx:i_tx|tx_cntrl:i_tx_cntrl|tx_data_cnt:i_tx_data_cnt
}
# end
# entity
tx_clk_div
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx_clk_div.vhd
1030435474
4
# storage
db|A8251.(29).cnf
db|A8251.(29).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx:i_tx|tx_cntrl:i_tx_cntrl|tx_clk_div:i_tx_clk_div
}
# end
# entity
tx_data_mux
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx_data_mux.vhd
1028800070
4
# storage
db|A8251.(30).cnf
db|A8251.(30).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx:i_tx|tx_data_mux:i_tx_data_mux
}
# end
# entity
tx_par_gen
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx_par_gen.vhd
1028800068
4
# storage
db|A8251.(31).cnf
db|A8251.(31).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx:i_tx|tx_par_gen:i_tx_par_gen
}
# end
# entity
tx_shift_reg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx_shift_reg.vhd
1028800066
4
# storage
db|A8251.(32).cnf
db|A8251.(32).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx:i_tx|tx_shift_reg:i_tx_shift_reg
}
# end
# entity
tx_line_mux
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx_line_mux.vhd
1028800068
4
# storage
db|A8251.(33).cnf
db|A8251.(33).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx:i_tx|tx_line_mux:i_tx_line_mux
}
# end
# entity
tx_fifo
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Tx_fifo.vhd
1028800068
4
# storage
db|A8251.(34).cnf
db|A8251.(34).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
tx_fifo:i_tx_fifo
}
# end
# complete