pmc5382_rx_pl3.v

VERILOG五POSPHY LEVEL3电路描述

    wren_val_tmp8,wren_val_tmp9,wren_val_tmp10,wren_val_tmp11,wren_val_tmp12,wren_val_tmp13,wren_val_tmp14,wren_val_tmp15;

reg pmc5382_renb_d;


wire        wr_ram_en_sop_tmp0; 
wire        wr_ram_en_eop_tmp0;
wire        wr_ram_en_err_tmp0;
wire   [1:0]wr_ram_en_mod_tmp0;
wire [31:0]wr_ram_en_data_tmp0;
wire        wr_ram_en_val_tmp0;

wire        wr_ram_en_sop_tmp1; 
wire        wr_ram_en_eop_tmp1;
wire        wr_ram_en_err_tmp1;
wire   [1:0]wr_ram_en_mod_tmp1;
wire [31:0]wr_ram_en_data_tmp1;
wire        wr_ram_en_val_tmp1;

wire        wr_ram_en_sop_tmp2; 
wire        wr_ram_en_eop_tmp2;
wire        wr_ram_en_err_tmp2;
wire   [1:0]wr_ram_en_mod_tmp2;
wire [31:0]wr_ram_en_data_tmp2;
wire        wr_ram_en_val_tmp2;

wire        wr_ram_en_sop_tmp3; 
wire        wr_ram_en_eop_tmp3;
wire        wr_ram_en_err_tmp3;
wire   [1:0]wr_ram_en_mod_tmp3;
wire [31:0]wr_ram_en_data_tmp3;
wire        wr_ram_en_val_tmp3;

wire        wr_ram_en_sop_tmp4; 
wire        wr_ram_en_eop_tmp4;
wire        wr_ram_en_err_tmp4;
wire   [1:0]wr_ram_en_mod_tmp4;
wire [31:0]wr_ram_en_data_tmp4;
wire        wr_ram_en_val_tmp4;

wire        wr_ram_en_sop_tmp5; 
wire        wr_ram_en_eop_tmp5;
wire        wr_ram_en_err_tmp5;
wire   [1:0]wr_ram_en_mod_tmp5;
wire [31:0]wr_ram_en_data_tmp5;
wire        wr_ram_en_val_tmp5;

wire        wr_ram_en_sop_tmp6; 
wire        wr_ram_en_eop_tmp6;
wire        wr_ram_en_err_tmp6;
wire   [1:0]wr_ram_en_mod_tmp6;
wire [31:0]wr_ram_en_data_tmp6;
wire        wr_ram_en_val_tmp6;

wire        wr_ram_en_sop_tmp7; 
wire        wr_ram_en_eop_tmp7;
wire        wr_ram_en_err_tmp7;
wire   [1:0]wr_ram_en_mod_tmp7;
wire [31:0]wr_ram_en_data_tmp7;
wire        wr_ram_en_val_tmp7;

wire        wr_ram_en_sop_tmp8; 
wire        wr_ram_en_eop_tmp8;
wire        wr_ram_en_err_tmp8;
wire   [1:0]wr_ram_en_mod_tmp8;
wire [31:0]wr_ram_en_data_tmp8;
wire        wr_ram_en_val_tmp8;

wire        wr_ram_en_sop_tmp9; 
wire        wr_ram_en_eop_tmp9;
wire        wr_ram_en_err_tmp9;
wire   [1:0]wr_ram_en_mod_tmp9;
wire [31:0]wr_ram_en_data_tmp9;
wire        wr_ram_en_val_tmp9;

wire        wr_ram_en_sop_tmp10; 
wire        wr_ram_en_eop_tmp10;
wire        wr_ram_en_err_tmp10;
wire   [1:0]wr_ram_en_mod_tmp10;
wire [31:0]wr_ram_en_data_tmp10;
wire        wr_ram_en_val_tmp10;

wire        wr_ram_en_sop_tmp11; 
wire        wr_ram_en_eop_tmp11;
wire        wr_ram_en_err_tmp11;
wire   [1:0]wr_ram_en_mod_tmp11;
wire [31:0]wr_ram_en_data_tmp11;
wire        wr_ram_en_val_tmp11;

wire        wr_ram_en_sop_tmp12; 
wire        wr_ram_en_eop_tmp12;
wire        wr_ram_en_err_tmp12;
wire   [1:0]wr_ram_en_mod_tmp12;
wire [31:0]wr_ram_en_data_tmp12;
wire        wr_ram_en_val_tmp12;

wire        wr_ram_en_sop_tmp13; 
wire        wr_ram_en_eop_tmp13;
wire        wr_ram_en_err_tmp13;
wire   [1:0]wr_ram_en_mod_tmp13;
wire [31:0]wr_ram_en_data_tmp13;
wire        wr_ram_en_val_tmp13;

wire        wr_ram_en_sop_tmp14; 
wire        wr_ram_en_eop_tmp14;
wire        wr_ram_en_err_tmp14;
wire   [1:0]wr_ram_en_mod_tmp14;
wire [31:0]wr_ram_en_data_tmp14;
wire        wr_ram_en_val_tmp14;

wire        wr_ram_en_sop_tmp15; 
wire        wr_ram_en_eop_tmp15;
wire        wr_ram_en_err_tmp15;
wire   [1:0]wr_ram_en_mod_tmp15;
wire [31:0]wr_ram_en_data_tmp15;
wire        wr_ram_en_val_tmp15;

//////////////////////////////////////////////////////////////////////
//test point assignment
always @(*)
begin
  if(h_reset_n)
    begin
      test_point[31:0]<=32'b0;
    end
  else if(s_reset_n)
    begin
      test_point[31:0]<=32'b0;
    end
  else
    case(test_sel[3:0])
      4'b0000: test_point[31:0]<={pmc5382_rdat[22:0],pmc5382_rmod[1:0],pmc5382_rprty,pmc5382_rerr,pmc5382_reop,pmc5382_rsop,pmc5382_rval,pmc5382_rsx,sys_clk_100m};
      4'b0001: test_point[31:0]<=32'b0;
      4'b0010: test_point[31:0]<=32'b0;      
      4'b0011: test_point[31:0]<=32'b0;
      4'b0100: test_point[31:0]<=32'b0;
      4'b0101: test_point[31:0]<=32'b0;
      4'b0110: test_point[31:0]<=32'b0;
      4'b0111: test_point[31:0]<=32'b0;
      4'b1000: test_point[31:0]<=32'b0;
      4'b1001: test_point[31:0]<=32'b0;
      4'b1010: test_point[31:0]<=32'b0;
      4'b1011: test_point[31:0]<=32'b0;
      4'b1100: test_point[31:0]<=32'b0;
      4'b1101: test_point[31:0]<=32'b0;
      4'b1110: test_point[31:0]<=32'b0;
      4'b1111: test_point[31:0]<=32'b0;
      default: ;
    endcase
end 

//////////////////////////////////////////////////////////////////////////////////////
//pmc5382_renb
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      pmc5382_renb <=1'b0;    
    end
  else if(~s_reset_n)
    begin
      pmc5382_renb <=1'b0;
    end
//  else if(wren_eop_tmp0|wren_eop_tmp1|wren_eop_tmp2|wren_eop_tmp3|wren_eop_tmp4|wren_eop_tmp5|wren_eop_tmp6|wren_eop_tmp7
//         |wren_eop_tmp8|wren_eop_tmp9|wren_eop_tmp10|wren_eop_tmp11|wren_eop_tmp12|wren_eop_tmp13|wren_eop_tmp14|wren_eop_tmp15)
//    begin
//      pmc5382_renb <=1'b1;
//    end
  else
    begin
      pmc5382_renb <=1'b0;
    end
end
//pmc5382_renb_d
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      pmc5382_renb_d <=1'b0;    
    end
  else if(~s_reset_n)
    begin
      pmc5382_renb_d <=1'b0;
    end
  else
    begin
      pmc5382_renb_d <=pmc5382_renb;
    end
end

//ch_id
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      ch_id <=4'd0;    
    end
  else if(~s_reset_n)
    begin
      ch_id <=4'd0;
    end
  else if(pmc5382_rsx)
    begin
      case(pmc5382_rdat[7:0])
        8'd0:ch_id <=4'd0;
        8'd1:ch_id <=4'd1;
        8'd2:ch_id <=4'd2;
        8'd3:ch_id <=4'd3;
        8'd4:ch_id <=4'd4;
        8'd5:ch_id <=4'd5;
        8'd6:ch_id <=4'd6;
        8'd7:ch_id <=4'd7;
        8'd8:ch_id <=4'd8;
        8'd9:ch_id <=4'd9;
        8'd10:ch_id <=4'd10;
        8'd11:ch_id <=4'd11;
        8'd12:ch_id <=4'd12;
        8'd13:ch_id <=4'd13;
        8'd14:ch_id <=4'd14;
        8'd15:ch_id <=4'd15;
        default:;
      endcase      
    end
  else
    begin
      ch_id <=ch_id;
    end
end

//wren_sop_tmp*