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📄 test02.map.eqn

📁 用quartusII编写的
💻 EQN
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-- Copyright (C) 1991-2006 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--Led[0] is Led[0]
--operation mode is arithmetic

Led[0]_lut_out = !Led[0];
Led[0] = DFFEAS(Led[0]_lut_out, clk, reset_b, , A1L62, , , A1L73, );

--A1L61 is Led[0]~208
--operation mode is arithmetic

A1L61 = CARRY(Led[0]);


--Led[1] is Led[1]
--operation mode is arithmetic

Led[1]_carry_eqn = A1L61;
Led[1]_lut_out = PDSwitch $ Led[1] $ Led[1]_carry_eqn;
Led[1] = DFFEAS(Led[1]_lut_out, clk, reset_b, , A1L62, , , A1L73, );

--A1L64 is Led[1]~212
--operation mode is arithmetic

A1L64 = CARRY(PDSwitch & !Led[1] & !A1L61 # !PDSwitch & (!A1L61 # !Led[1]));


--Led[2] is Led[2]
--operation mode is arithmetic

Led[2]_carry_eqn = A1L64;
Led[2]_lut_out = PDSwitch $ Led[2] $ !Led[2]_carry_eqn;
Led[2] = DFFEAS(Led[2]_lut_out, clk, reset_b, , A1L62, , , A1L73, );

--A1L66 is Led[2]~216
--operation mode is arithmetic

A1L66 = CARRY(PDSwitch & (Led[2] # !A1L64) # !PDSwitch & Led[2] & !A1L64);


--Led[3] is Led[3]
--operation mode is normal

Led[3]_carry_eqn = A1L66;
Led[3]_lut_out = PDSwitch $ Led[3] $ Led[3]_carry_eqn;
Led[3] = DFFEAS(Led[3]_lut_out, clk, reset_b, , A1L62, , , A1L73, );


--count[15] is count[15]
--operation mode is normal

count[15]_lut_out = A1L1 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[15] = DFFEAS(count[15]_lut_out, clk, reset_b, , , , , , );


--count[14] is count[14]
--operation mode is normal

count[14]_lut_out = A1L2 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[14] = DFFEAS(count[14]_lut_out, clk, reset_b, , , , , , );


--count[13] is count[13]
--operation mode is normal

count[13]_lut_out = A1L4 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[13] = DFFEAS(count[13]_lut_out, clk, reset_b, , , , , , );


--count[12] is count[12]
--operation mode is normal

count[12]_lut_out = A1L6 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[12] = DFFEAS(count[12]_lut_out, clk, reset_b, , , , , , );


--A1L53 is Equal~184
--operation mode is normal

A1L53 = !count[15] & !count[14] & !count[13] & !count[12];


--count[11] is count[11]
--operation mode is normal

count[11]_lut_out = A1L8 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[11] = DFFEAS(count[11]_lut_out, clk, reset_b, , , , , , );


--count[10] is count[10]
--operation mode is normal

count[10]_lut_out = A1L10 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[10] = DFFEAS(count[10]_lut_out, clk, reset_b, , , , , , );


--count[9] is count[9]
--operation mode is normal

count[9]_lut_out = A1L12 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[9] = DFFEAS(count[9]_lut_out, clk, reset_b, , , , , , );


--count[8] is count[8]
--operation mode is normal

count[8]_lut_out = A1L14 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[8] = DFFEAS(count[8]_lut_out, clk, reset_b, , , , , , );


--A1L54 is Equal~185
--operation mode is normal

A1L54 = !count[11] & !count[10] & !count[9] & !count[8];


--count[7] is count[7]
--operation mode is normal

count[7]_lut_out = A1L16 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[7] = DFFEAS(count[7]_lut_out, clk, reset_b, , , , , , );


--count[6] is count[6]
--operation mode is normal

count[6]_lut_out = A1L18 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[6] = DFFEAS(count[6]_lut_out, clk, reset_b, , , , , , );


--count[5] is count[5]
--operation mode is normal

count[5]_lut_out = A1L20 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[5] = DFFEAS(count[5]_lut_out, clk, reset_b, , , , , , );


--count[4] is count[4]
--operation mode is normal

count[4]_lut_out = A1L22 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[4] = DFFEAS(count[4]_lut_out, clk, reset_b, , , , , , );


--A1L55 is Equal~186
--operation mode is normal

A1L55 = !count[7] & !count[6] & !count[5] & !count[4];


--count[3] is count[3]
--operation mode is normal

count[3]_lut_out = A1L24 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[3] = DFFEAS(count[3]_lut_out, clk, reset_b, , , , , , );


--count[2] is count[2]
--operation mode is normal

count[2]_lut_out = A1L26 & PBSwitch_flop1 & PBSwitch_flop2 & !A1L58;
count[2] = DFFEAS(count[2]_lut_out, clk, reset_b, , , , , , );


--count[1] is count[1]
--operation mode is normal

count[1]_lut_out = PBSwitch_flop1 & (A1L28 & !A1L58 # !PBSwitch_flop2);
count[1] = DFFEAS(count[1]_lut_out, clk, reset_b, , , , , , );


--A1L56 is Equal~187
--operation mode is normal

A1L56 = !count[3] & !count[2] & !count[1];


--A1L57 is Equal~188
--operation mode is normal

A1L57 = A1L53 & A1L54 & A1L55 & A1L56;


--count[0] is count[0]
--operation mode is normal

count[0]_lut_out = PBSwitch_flop1 & (A1L30 & !A1L58 # !PBSwitch_flop2);
count[0] = DFFEAS(count[0]_lut_out, clk, reset_b, , , , , , );


--PBSwitch_flop2 is PBSwitch_flop2
--operation mode is normal

PBSwitch_flop2_lut_out = PBSwitch_flop1;
PBSwitch_flop2 = DFFEAS(PBSwitch_flop2_lut_out, clk, reset_b, , , , , , );


--PBSwitch_flop1 is PBSwitch_flop1
--operation mode is normal

PBSwitch_flop1_lut_out = !PBSwitch;
PBSwitch_flop1 = DFFEAS(PBSwitch_flop1_lut_out, clk, reset_b, , , , , , );


--A1L73 is PB_valid~21
--operation mode is normal

A1L73 = !PBSwitch_flop2 & PBSwitch_flop1 # !count[0] # !A1L57;


--DipSwitch_flop2 is DipSwitch_flop2
--operation mode is normal

DipSwitch_flop2_lut_out = DipSwitch_flop1;
DipSwitch_flop2 = DFFEAS(DipSwitch_flop2_lut_out, clk, reset_b, , , , , , );


--A1L62 is Led[0]~223
--operation mode is normal

A1L62 = DipSwitch_flop2 # !A1L73;


--A1L1 is add~372
--operation mode is normal

A1L1_carry_eqn = A1L3;
A1L1 = count[15] $ (!A1L1_carry_eqn);


--A1L58 is Equal~189
--operation mode is normal

A1L58 = A1L57 & (!count[0]);


--A1L2 is add~377
--operation mode is arithmetic

A1L2_carry_eqn = A1L5;
A1L2 = count[14] $ (A1L2_carry_eqn);

--A1L3 is add~379
--operation mode is arithmetic

A1L3 = CARRY(count[14] # !A1L5);


--A1L4 is add~382
--operation mode is arithmetic

A1L4_carry_eqn = A1L7;
A1L4 = count[13] $ (!A1L4_carry_eqn);

--A1L5 is add~384
--operation mode is arithmetic

A1L5 = CARRY(!count[13] & (!A1L7));


--A1L6 is add~387
--operation mode is arithmetic

A1L6_carry_eqn = A1L9;
A1L6 = count[12] $ (A1L6_carry_eqn);

--A1L7 is add~389
--operation mode is arithmetic

A1L7 = CARRY(count[12] # !A1L9);


--A1L8 is add~392
--operation mode is arithmetic

A1L8_carry_eqn = A1L11;
A1L8 = count[11] $ (!A1L8_carry_eqn);

--A1L9 is add~394
--operation mode is arithmetic

A1L9 = CARRY(!count[11] & (!A1L11));


--A1L10 is add~397
--operation mode is arithmetic

A1L10_carry_eqn = A1L13;
A1L10 = count[10] $ (A1L10_carry_eqn);

--A1L11 is add~399
--operation mode is arithmetic

A1L11 = CARRY(count[10] # !A1L13);


--A1L12 is add~402
--operation mode is arithmetic

A1L12_carry_eqn = A1L15;
A1L12 = count[9] $ (!A1L12_carry_eqn);

--A1L13 is add~404
--operation mode is arithmetic

A1L13 = CARRY(!count[9] & (!A1L15));


--A1L14 is add~407
--operation mode is arithmetic

A1L14_carry_eqn = A1L17;
A1L14 = count[8] $ (A1L14_carry_eqn);

--A1L15 is add~409
--operation mode is arithmetic

A1L15 = CARRY(count[8] # !A1L17);


--A1L16 is add~412
--operation mode is arithmetic

A1L16_carry_eqn = A1L19;
A1L16 = count[7] $ (!A1L16_carry_eqn);

--A1L17 is add~414
--operation mode is arithmetic

A1L17 = CARRY(!count[7] & (!A1L19));


--A1L18 is add~417
--operation mode is arithmetic

A1L18_carry_eqn = A1L21;
A1L18 = count[6] $ (A1L18_carry_eqn);

--A1L19 is add~419
--operation mode is arithmetic

A1L19 = CARRY(count[6] # !A1L21);


--A1L20 is add~422
--operation mode is arithmetic

A1L20_carry_eqn = A1L23;
A1L20 = count[5] $ (!A1L20_carry_eqn);

--A1L21 is add~424
--operation mode is arithmetic

A1L21 = CARRY(!count[5] & (!A1L23));


--A1L22 is add~427
--operation mode is arithmetic

A1L22_carry_eqn = A1L25;
A1L22 = count[4] $ (A1L22_carry_eqn);

--A1L23 is add~429
--operation mode is arithmetic

A1L23 = CARRY(count[4] # !A1L25);


--A1L24 is add~432
--operation mode is arithmetic

A1L24_carry_eqn = A1L27;
A1L24 = count[3] $ (!A1L24_carry_eqn);

--A1L25 is add~434
--operation mode is arithmetic

A1L25 = CARRY(!count[3] & (!A1L27));


--A1L26 is add~437
--operation mode is arithmetic

A1L26_carry_eqn = A1L29;
A1L26 = count[2] $ (A1L26_carry_eqn);

--A1L27 is add~439
--operation mode is arithmetic

A1L27 = CARRY(count[2] # !A1L29);


--A1L28 is add~442
--operation mode is arithmetic

A1L28_carry_eqn = A1L31;
A1L28 = count[1] $ (!A1L28_carry_eqn);

--A1L29 is add~444
--operation mode is arithmetic

A1L29 = CARRY(!count[1] & (!A1L31));


--A1L30 is add~447
--operation mode is arithmetic

A1L30 = !count[0];

--A1L31 is add~449
--operation mode is arithmetic

A1L31 = CARRY(count[0]);


--DipSwitch_flop1 is DipSwitch_flop1
--operation mode is normal

DipSwitch_flop1_lut_out = DipSwitch;
DipSwitch_flop1 = DFFEAS(DipSwitch_flop1_lut_out, clk, reset_b, , , , , , );


--clk is clk
--operation mode is input

clk = INPUT();


--reset_b is reset_b
--operation mode is input

reset_b = INPUT();


--PDSwitch is PDSwitch
--operation mode is input

PDSwitch = INPUT();


--PBSwitch is PBSwitch
--operation mode is input

PBSwitch = INPUT();


--DipSwitch is DipSwitch
--operation mode is input

DipSwitch = INPUT();


--Led_inv[0] is Led_inv[0]
--operation mode is output

Led_inv[0] = OUTPUT(!Led[0]);


--Led_inv[1] is Led_inv[1]
--operation mode is output

Led_inv[1] = OUTPUT(!Led[1]);


--Led_inv[2] is Led_inv[2]
--operation mode is output

Led_inv[2] = OUTPUT(!Led[2]);


--Led_inv[3] is Led_inv[3]
--operation mode is output

Led_inv[3] = OUTPUT(!Led[3]);


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