test02.fit.eqn

用quartusII编写的

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--Led[0] is Led[0] at LC_X10_Y4_N0
--operation mode is arithmetic

Led[0]_lut_out = !Led[0];
Led[0] = DFFEAS(Led[0]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , A1L75, , , A1L88, );

--A1L73 is Led[0]~208 at LC_X10_Y4_N0
--operation mode is arithmetic

A1L73_cout_0 = Led[0];
A1L73 = CARRY(A1L73_cout_0);

--A1L74 is Led[0]~208COUT1_225 at LC_X10_Y4_N0
--operation mode is arithmetic

A1L74_cout_1 = Led[0];
A1L74 = CARRY(A1L74_cout_1);


--Led[1] is Led[1] at LC_X10_Y4_N1
--operation mode is arithmetic

Led[1]_lut_out = PDSwitch $ Led[1] $ A1L73;
Led[1] = DFFEAS(Led[1]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , A1L75, , , A1L88, );

--A1L77 is Led[1]~212 at LC_X10_Y4_N1
--operation mode is arithmetic

A1L77_cout_0 = PDSwitch & !Led[1] & !A1L73 # !PDSwitch & (!A1L73 # !Led[1]);
A1L77 = CARRY(A1L77_cout_0);

--A1L78 is Led[1]~212COUT1 at LC_X10_Y4_N1
--operation mode is arithmetic

A1L78_cout_1 = PDSwitch & !Led[1] & !A1L74 # !PDSwitch & (!A1L74 # !Led[1]);
A1L78 = CARRY(A1L78_cout_1);


--Led[2] is Led[2] at LC_X10_Y4_N2
--operation mode is arithmetic

Led[2]_lut_out = PDSwitch $ Led[2] $ !A1L77;
Led[2] = DFFEAS(Led[2]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , A1L75, , , A1L88, );

--A1L80 is Led[2]~216 at LC_X10_Y4_N2
--operation mode is arithmetic

A1L80_cout_0 = PDSwitch & (Led[2] # !A1L77) # !PDSwitch & Led[2] & !A1L77;
A1L80 = CARRY(A1L80_cout_0);

--A1L81 is Led[2]~216COUT1_226 at LC_X10_Y4_N2
--operation mode is arithmetic

A1L81_cout_1 = PDSwitch & (Led[2] # !A1L78) # !PDSwitch & Led[2] & !A1L78;
A1L81 = CARRY(A1L81_cout_1);


--Led[3] is Led[3] at LC_X10_Y4_N3
--operation mode is normal

Led[3]_lut_out = PDSwitch $ (A1L80 $ Led[3]);
Led[3] = DFFEAS(Led[3]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , A1L75, , , A1L88, );


--count[15] is count[15] at LC_X12_Y5_N8
--operation mode is normal

count[15]_lut_out = PBSwitch_flop1 & !A1L70 & PBSwitch_flop2 & A1L1;
count[15] = DFFEAS(count[15]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[14] is count[14] at LC_X12_Y4_N9
--operation mode is normal

count[14]_lut_out = PBSwitch_flop2 & PBSwitch_flop1 & A1L2 & !A1L70;
count[14] = DFFEAS(count[14]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[13] is count[13] at LC_X12_Y4_N0
--operation mode is normal

count[13]_lut_out = PBSwitch_flop2 & PBSwitch_flop1 & A1L5 & !A1L70;
count[13] = DFFEAS(count[13]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[12] is count[12] at LC_X12_Y4_N1
--operation mode is normal

count[12]_lut_out = PBSwitch_flop2 & PBSwitch_flop1 & A1L8 & !A1L70;
count[12] = DFFEAS(count[12]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--A1L65 is Equal~184 at LC_X11_Y4_N4
--operation mode is normal

A1L65 = !count[12] & !count[13] & !count[15] & !count[14];


--count[11] is count[11] at LC_X11_Y4_N8
--operation mode is normal

count[11]_lut_out = PBSwitch_flop1 & A1L10 & !A1L70 & PBSwitch_flop2;
count[11] = DFFEAS(count[11]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[10] is count[10] at LC_X12_Y4_N8
--operation mode is normal

count[10]_lut_out = PBSwitch_flop2 & PBSwitch_flop1 & A1L13 & !A1L70;
count[10] = DFFEAS(count[10]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[9] is count[9] at LC_X11_Y4_N5
--operation mode is normal

count[9]_lut_out = PBSwitch_flop1 & A1L16 & !A1L70 & PBSwitch_flop2;
count[9] = DFFEAS(count[9]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[8] is count[8] at LC_X12_Y5_N9
--operation mode is normal

count[8]_lut_out = PBSwitch_flop2 & A1L19 & PBSwitch_flop1 & !A1L70;
count[8] = DFFEAS(count[8]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--A1L66 is Equal~185 at LC_X11_Y4_N3
--operation mode is normal

A1L66 = !count[10] & !count[9] & !count[8] & !count[11];


--count[7] is count[7] at LC_X12_Y4_N4
--operation mode is normal

count[7]_lut_out = PBSwitch_flop2 & PBSwitch_flop1 & A1L22 & !A1L70;
count[7] = DFFEAS(count[7]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[6] is count[6] at LC_X12_Y4_N5
--operation mode is normal

count[6]_lut_out = PBSwitch_flop2 & !A1L70 & PBSwitch_flop1 & A1L24;
count[6] = DFFEAS(count[6]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[5] is count[5] at LC_X12_Y4_N2
--operation mode is normal

count[5]_lut_out = PBSwitch_flop2 & PBSwitch_flop1 & A1L27 & !A1L70;
count[5] = DFFEAS(count[5]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[4] is count[4] at LC_X12_Y4_N6
--operation mode is normal

count[4]_lut_out = PBSwitch_flop2 & PBSwitch_flop1 & A1L30 & !A1L70;
count[4] = DFFEAS(count[4]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--A1L67 is Equal~186 at LC_X11_Y4_N9
--operation mode is normal

A1L67 = !count[5] & !count[4] & !count[6] & !count[7];


--count[3] is count[3] at LC_X12_Y4_N7
--operation mode is normal

count[3]_lut_out = PBSwitch_flop2 & PBSwitch_flop1 & A1L33 & !A1L70;
count[3] = DFFEAS(count[3]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[2] is count[2] at LC_X12_Y6_N0
--operation mode is normal

count[2]_lut_out = PBSwitch_flop2 & PBSwitch_flop1 & A1L36 & !A1L70;
count[2] = DFFEAS(count[2]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--count[1] is count[1] at LC_X11_Y6_N2
--operation mode is normal

count[1]_lut_out = PBSwitch_flop1 & (A1L38 & !A1L70 # !PBSwitch_flop2);
count[1] = DFFEAS(count[1]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--A1L68 is Equal~187 at LC_X11_Y4_N1
--operation mode is normal

A1L68 = !count[2] & (!count[3] & !count[1]);


--A1L69 is Equal~188 at LC_X11_Y4_N2
--operation mode is normal

A1L69 = A1L67 & A1L66 & A1L65 & A1L68;


--count[0] is count[0] at LC_X12_Y6_N1
--operation mode is normal

count[0]_lut_out = PBSwitch_flop1 & (A1L41 & !A1L70 # !PBSwitch_flop2);
count[0] = DFFEAS(count[0]_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--PBSwitch_flop1 is PBSwitch_flop1 at LC_X12_Y4_N3
--operation mode is normal

PBSwitch_flop1_lut_out = !PBSwitch;
PBSwitch_flop1 = DFFEAS(PBSwitch_flop1_lut_out, GLOBAL(clk), GLOBAL(reset_b), , , , , , );


--A1L88 is PB_valid~21 at LC_X11_Y4_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

PBSwitch_flop2_qfbk = PBSwitch_flop2;
A1L88 = PBSwitch_flop1 & !PBSwitch_flop2_qfbk # !count[0] # !A1L69;

--PBSwitch_flop2 is PBSwitch_flop2 at LC_X11_Y4_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

PBSwitch_flop2 = DFFEAS(A1L88, GLOBAL(clk), GLOBAL(reset_b), , , PBSwitch_flop1, , , VCC);


--A1L75 is Led[0]~223 at LC_X11_Y4_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

DipSwitch_flop2_qfbk = DipSwitch_flop2;
A1L75 = DipSwitch_flop2_qfbk # !A1L88;

--DipSwitch_flop2 is DipSwitch_flop2 at LC_X11_Y4_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

DipSwitch_flop2 = DFFEAS(A1L75, GLOBAL(clk), GLOBAL(reset_b), , , DipSwitch_flop1, , , VCC);


--A1L1 is add~372 at LC_X12_Y5_N7
--operation mode is normal

A1L1_carry_eqn = (!A1L9 & A1L3) # (A1L9 & A1L4);
A1L1 = count[15] $ !A1L1_carry_eqn;


--A1L70 is Equal~189 at LC_X11_Y4_N7
--operation mode is normal

A1L70 = A1L69 & !count[0];


--A1L2 is add~377 at LC_X12_Y5_N6
--operation mode is arithmetic

A1L2_carry_eqn = (!A1L9 & A1L6) # (A1L9 & A1L7);
A1L2 = count[14] $ (A1L2_carry_eqn);

--A1L3 is add~379 at LC_X12_Y5_N6
--operation mode is arithmetic

A1L3_cout_0 = count[14] # !A1L6;
A1L3 = CARRY(A1L3_cout_0);

--A1L4 is add~379COUT1_464 at LC_X12_Y5_N6
--operation mode is arithmetic

A1L4_cout_1 = count[14] # !A1L7;
A1L4 = CARRY(A1L4_cout_1);


--A1L5 is add~382 at LC_X12_Y5_N5
--operation mode is arithmetic

A1L5_carry_eqn = A1L9;
A1L5 = count[13] $ !A1L5_carry_eqn;

--A1L6 is add~384 at LC_X12_Y5_N5
--operation mode is arithmetic

A1L6_cout_0 = !count[13] & !A1L9;
A1L6 = CARRY(A1L6_cout_0);