box.map.qmsg

用vhdl语言编写的基于fpga的波形发生器

{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_dpu.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_dpu.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_dpu " "Info: Found entity 1: altsyncram_dpu" {  } { { "db/altsyncram_dpu.tdf" "" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/db/altsyncram_dpu.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_dpu allwave:u1\|altsyncram:altsyncram_component\|altsyncram_dpu:auto_generated " "Info: Elaborating entity \"altsyncram_dpu\" for hierarchy \"allwave:u1\|altsyncram:altsyncram_component\|altsyncram_dpu:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "d:/aa/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_sfa2.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_sfa2.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_sfa2 " "Info: Found entity 1: altsyncram_sfa2" {  } { { "db/altsyncram_sfa2.tdf" "" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/db/altsyncram_sfa2.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_sfa2 allwave:u1\|altsyncram:altsyncram_component\|altsyncram_dpu:auto_generated\|altsyncram_sfa2:altsyncram1 " "Info: Elaborating entity \"altsyncram_sfa2\" for hierarchy \"allwave:u1\|altsyncram:altsyncram_component\|altsyncram_dpu:auto_generated\|altsyncram_sfa2:altsyncram1\"" {  } { { "db/altsyncram_dpu.tdf" "altsyncram1" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/db/altsyncram_dpu.tdf" 34 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd 3 1 " "Info: Found 3 design units, including 1 entities, in source file d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_mod_ram_rom_pack " "Info: Found design unit 1: sld_mod_ram_rom_pack" {  } { { "d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd" 4 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_mod_ram_rom-rtl " "Info: Found design unit 2: sld_mod_ram_rom-rtl" {  } { { "d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd" 72 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_mod_ram_rom " "Info: Found entity 1: sld_mod_ram_rom" {  } { { "d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd" 16 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sld_mod_ram_rom allwave:u1\|altsyncram:altsyncram_component\|altsyncram_dpu:auto_generated\|sld_mod_ram_rom:mgl_prim2 " "Info: Elaborating entity \"sld_mod_ram_rom\" for hierarchy \"allwave:u1\|altsyncram:altsyncram_component\|altsyncram_dpu:auto_generated\|sld_mod_ram_rom:mgl_prim2\"" {  } { { "db/altsyncram_dpu.tdf" "mgl_prim2" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/db/altsyncram_dpu.tdf" 35 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/aa/altera/quartus51/libraries/megafunctions/sld_rom_sr.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file d:/aa/altera/quartus51/libraries/megafunctions/sld_rom_sr.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_rom_sr-INFO_REG " "Info: Found design unit 1: sld_rom_sr-INFO_REG" {  } { { "d:/aa/altera/quartus51/libraries/megafunctions/sld_rom_sr.vhd" "" { Text "d:/aa/altera/quartus51/libraries/megafunctions/sld_rom_sr.vhd" 27 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_rom_sr " "Info: Found entity 1: sld_rom_sr" {  } { { "d:/aa/altera/quartus51/libraries/megafunctions/sld_rom_sr.vhd" "" { Text "d:/aa/altera/quartus51/libraries/megafunctions/sld_rom_sr.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sld_rom_sr allwave:u1\|altsyncram:altsyncram_component\|altsyncram_dpu:auto_generated\|sld_mod_ram_rom:mgl_prim2\|sld_rom_sr:\\ram_rom_logic_gen:name_gen:info_rom_sr " "Info: Elaborating entity \"sld_rom_sr\" for hierarchy \"allwave:u1\|altsyncram:altsyncram_component\|altsyncram_dpu:auto_generated\|sld_mod_ram_rom:mgl_prim2\|sld_rom_sr:\\ram_rom_logic_gen:name_gen:info_rom_sr\"" {  } { { "d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd" "\\ram_rom_logic_gen:name_gen:info_rom_sr" { Text "d:/aa/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd" 635 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PLLU PLLU:u2 " "Info: Elaborating entity \"PLLU\" for hierarchy \"PLLU:u2\"" {  } { { "BOX.vhd" "u2" { Text "C:/Documents and Settings/zhao/My Documents/zhao/新建文件夹/BOX.vhd" 377 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/aa/altera/quartus51/libraries/megafunctions/altpll.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/aa/altera/quartus51/libraries/megafunctions/altpll.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altpll " "Info: Found entity 1: altpll" {  } { { "altpll.tdf" "" { Text "d:/aa/altera/quartus51/libraries/megafunctions/altpll.tdf" 363 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}