up3_clock.tan.summary

用VHDL语言编写的一个闹钟程序

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 8.389 ns
From           : reset
To             : CLK_COUNT_400HZ[15]
From Clock     : --
To Clock       : clk_48Mhz
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 51.523 ns
From           : BCD_MIND0[2]
To             : ALARM_LED
From Clock     : clk_48Mhz
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 42.267 ns
From           : CLOSE_ALARM
To             : ALARM_LED
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 4.301 ns
From           : SET_CHANGE
To             : next_command1.write_hour
From Clock     : --
To Clock       : clk_48Mhz
Failed Paths   : 0

Type           : Clock Setup: 'clk_48Mhz'
Slack          : N/A
Required Time  : None
Actual Time    : 94.42 MHz ( period = 10.591 ns )
From           : BCD_SECD1[2]
To             : DATA_BUS_VALUE[2]
From Clock     : clk_48Mhz
To Clock       : clk_48Mhz
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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