up3_clock.sim.rpt

用VHDL语言编写的一个闹钟程序

; |UP3_CLOCK|BCD_MIND1[0]                      ; |UP3_CLOCK|BCD_MIND1[0]                      ; regout           ;
; |UP3_CLOCK|BCD_M1[0]                         ; |UP3_CLOCK|BCD_M1[0]                         ; regout           ;
; |UP3_CLOCK|BCD_H1[0]                         ; |UP3_CLOCK|BCD_H1[0]                         ; regout           ;
; |UP3_CLOCK|process3~358                      ; |UP3_CLOCK|process3~358                      ; combout          ;
; |UP3_CLOCK|process3~359                      ; |UP3_CLOCK|process3~359                      ; combout          ;
; |UP3_CLOCK|BCD_MIND0[2]                      ; |UP3_CLOCK|BCD_MIND0[2]                      ; regout           ;
; |UP3_CLOCK|BCD_M0[2]                         ; |UP3_CLOCK|BCD_M0[2]                         ; regout           ;
; |UP3_CLOCK|process3~360                      ; |UP3_CLOCK|process3~360                      ; combout          ;
; |UP3_CLOCK|BCD_MIND0[0]                      ; |UP3_CLOCK|BCD_MIND0[0]                      ; regout           ;
; |UP3_CLOCK|BCD_M0[0]                         ; |UP3_CLOCK|BCD_M0[0]                         ; regout           ;
; |UP3_CLOCK|process3~361                      ; |UP3_CLOCK|process3~361                      ; combout          ;
; |UP3_CLOCK|process3~362                      ; |UP3_CLOCK|process3~362                      ; combout          ;
; |UP3_CLOCK|BCD_S1[0]                         ; |UP3_CLOCK|BCD_S1[0]                         ; regout           ;
; |UP3_CLOCK|BCD_MIND0[1]                      ; |UP3_CLOCK|BCD_MIND0[1]                      ; regout           ;
; |UP3_CLOCK|BCD_M0[1]                         ; |UP3_CLOCK|BCD_M0[1]                         ; regout           ;
; |UP3_CLOCK|BCD_SECD1[0]                      ; |UP3_CLOCK|BCD_SECD1[0]                      ; regout           ;
; |UP3_CLOCK|process3~363                      ; |UP3_CLOCK|process3~363                      ; combout          ;
; |UP3_CLOCK|BCD_S1[2]                         ; |UP3_CLOCK|BCD_S1[2]                         ; regout           ;
; |UP3_CLOCK|BCD_H0[3]                         ; |UP3_CLOCK|BCD_H0[3]                         ; regout           ;
; |UP3_CLOCK|BCD_SECD1[2]                      ; |UP3_CLOCK|BCD_SECD1[2]                      ; regout           ;
; |UP3_CLOCK|process3~364                      ; |UP3_CLOCK|process3~364                      ; combout          ;
; |UP3_CLOCK|BCD_HRD0[1]                       ; |UP3_CLOCK|BCD_HRD0[1]                       ; regout           ;
; |UP3_CLOCK|BCD_H1[1]                         ; |UP3_CLOCK|BCD_H1[1]                         ; regout           ;
; |UP3_CLOCK|process3~365                      ; |UP3_CLOCK|process3~365                      ; combout          ;
; |UP3_CLOCK|process3~366                      ; |UP3_CLOCK|process3~366                      ; combout          ;
; |UP3_CLOCK|process3~367                      ; |UP3_CLOCK|process3~367                      ; combout          ;
; |UP3_CLOCK|process3~368                      ; |UP3_CLOCK|process3~368                      ; combout          ;
; |UP3_CLOCK|LessThan~2092                     ; |UP3_CLOCK|LessThan~2092                     ; combout          ;
; |UP3_CLOCK|LessThan~2093                     ; |UP3_CLOCK|LessThan~2093                     ; combout          ;
; |UP3_CLOCK|LessThan~2094                     ; |UP3_CLOCK|LessThan~2094                     ; combout          ;
; |UP3_CLOCK|LessThan~2095                     ; |UP3_CLOCK|LessThan~2095                     ; combout          ;
; |UP3_CLOCK|LessThan~2096                     ; |UP3_CLOCK|LessThan~2096                     ; combout          ;
; |UP3_CLOCK|LessThan~2097                     ; |UP3_CLOCK|LessThan~2097                     ; combout          ;
; |UP3_CLOCK|LessThan~2098                     ; |UP3_CLOCK|LessThan~2098                     ; combout          ;
; |UP3_CLOCK|LessThan~2099                     ; |UP3_CLOCK|LessThan~2099                     ; combout          ;
; |UP3_CLOCK|LessThan~2100                     ; |UP3_CLOCK|LessThan~2100                     ; combout          ;
; |UP3_CLOCK|LessThan~2101                     ; |UP3_CLOCK|LessThan~2101                     ; combout          ;
; |UP3_CLOCK|process3~369                      ; |UP3_CLOCK|process3~369                      ; combout          ;
; |UP3_CLOCK|process3~370                      ; |UP3_CLOCK|process3~370                      ; combout          ;
; |UP3_CLOCK|process3~371                      ; |UP3_CLOCK|process3~371                      ; combout          ;
; |UP3_CLOCK|process4~60                       ; |UP3_CLOCK|process4~60                       ; combout          ;
; |UP3_CLOCK|process3~372                      ; |UP3_CLOCK|process3~372                      ; combout          ;
; |UP3_CLOCK|ALARM_LED~164                     ; |UP3_CLOCK|ALARM_LED~164                     ; combout          ;
; |UP3_CLOCK|ALARM_LED~165                     ; |UP3_CLOCK|ALARM_LED~165                     ; combout          ;
; |UP3_CLOCK|BCD_MIND0[2]~515                  ; |UP3_CLOCK|BCD_MIND0[2]~515                  ; combout          ;
; |UP3_CLOCK|process4~61                       ; |UP3_CLOCK|process4~61                       ; combout          ;
; |UP3_CLOCK|BCD_SECD0[2]~458                  ; |UP3_CLOCK|BCD_SECD0[2]~458                  ; combout          ;
; |UP3_CLOCK|process4~62                       ; |UP3_CLOCK|process4~62                       ; combout          ;
; |UP3_CLOCK|process4~63                       ; |UP3_CLOCK|process4~63                       ; combout          ;
; |UP3_CLOCK|state.display_set                 ; |UP3_CLOCK|state.display_set                 ; regout           ;
; |UP3_CLOCK|reduce_or~121                     ; |UP3_CLOCK|reduce_or~121                     ; combout          ;
; |UP3_CLOCK|reduce_or~121                     ; |UP3_CLOCK|state.toggle_e                    ; regout           ;
; |UP3_CLOCK|state.mode_set                    ; |UP3_CLOCK|state.mode_set                    ; regout           ;
; |UP3_CLOCK|state.return_home                 ; |UP3_CLOCK|state.return_home                 ; regout           ;
; |UP3_CLOCK|state.goto_nextline               ; |UP3_CLOCK|state.goto_nextline               ; regout           ;
; |UP3_CLOCK|state.display_off                 ; |UP3_CLOCK|state.display_off                 ; regout           ;
; |UP3_CLOCK|state.display_set~96              ; |UP3_CLOCK|state.display_set~96              ; combout          ;
; |UP3_CLOCK|state.display_on                  ; |UP3_CLOCK|state.display_on                  ; regout           ;
; |UP3_CLOCK|state.display_clear               ; |UP3_CLOCK|state.display_clear               ; regout           ;
; |UP3_CLOCK|state.display_set~97              ; |UP3_CLOCK|state.display_set~97              ; combout          ;
; |UP3_CLOCK|state.reset1                      ; |UP3_CLOCK|state.reset1                      ; regout           ;
; |UP3_CLOCK|state.func_set                    ; |UP3_CLOCK|state.func_set                    ; regout           ;
; |UP3_CLOCK|state.reset2                      ; |UP3_CLOCK|state.reset2                      ; regout           ;
; |UP3_CLOCK|state.reset3                      ; |UP3_CLOCK|state.reset3                      ; regout           ;
; |UP3_CLOCK|state.display_set~98              ; |UP3_CLOCK|state.display_set~98              ; combout          ;
; |UP3_CLOCK|CLK_400HZ                         ; |UP3_CLOCK|CLK_400HZ                         ; regout           ;
; |UP3_CLOCK|CLK_10HZ                          ; |UP3_CLOCK|CLK_10HZ                          ; regout           ;
; |UP3_CLOCK|state1.write_sec                  ; |UP3_CLOCK|state1.write_sec                  ; regout           ;
; |UP3_CLOCK|BCD_SECD0[1]~460                  ; |UP3_CLOCK|BCD_SECD0[1]~460                  ; combout          ;
; |UP3_CLOCK|BCD_TSEC[1]                       ; |UP3_CLOCK|BCD_TSEC[1]                       ; regout           ;
; |UP3_CLOCK|BCD_TSEC[0]                       ; |UP3_CLOCK|BCD_TSEC[0]                       ; regout           ;
; |UP3_CLOCK|BCD_TSEC[3]                       ; |UP3_CLOCK|BCD_TSEC[3]                       ; regout           ;
; |UP3_CLOCK|LessThan~2102                     ; |UP3_CLOCK|LessThan~2102                     ; combout          ;
; |UP3_CLOCK|process2~0                        ; |UP3_CLOCK|process2~0                        ; combout          ;
; |UP3_CLOCK|BCD_SECD0[1]~461                  ; |UP3_CLOCK|BCD_SECD0[1]~461                  ; combout          ;
; |UP3_CLOCK|state2.alarm_sec                  ; |UP3_CLOCK|state2.alarm_sec                  ; regout           ;
; |UP3_CLOCK|BCD_HRD1[3]~563                   ; |UP3_CLOCK|BCD_HRD1[3]~563                   ; combout          ;
; |UP3_CLOCK|process1~0                        ; |UP3_CLOCK|process1~0                        ; combout          ;
; |UP3_CLOCK|process2~121                      ; |UP3_CLOCK|process2~121                      ; combout          ;
; |UP3_CLOCK|add~3311                          ; |UP3_CLOCK|add~3311                          ; combout          ;
; |UP3_CLOCK|process2~122                      ; |UP3_CLOCK|process2~122                      ; combout          ;
; |UP3_CLOCK|process2~123                      ; |UP3_CLOCK|process2~123                      ; combout          ;
; |UP3_CLOCK|process2~124                      ; |UP3_CLOCK|process2~124                      ; combout          ;
; |UP3_CLOCK|state1.write_hour                 ; |UP3_CLOCK|state1.write_hour                 ; regout           ;
; |UP3_CLOCK|LessThan~2103                     ; |UP3_CLOCK|LessThan~2103                     ; combout          ;
; |UP3_CLOCK|LessThan~2104                     ; |UP3_CLOCK|LessThan~2104                     ; combout          ;
; |UP3_CLOCK|BCD_DAY0[0]~394                   ; |UP3_CLOCK|BCD_DAY0[0]~394                   ; combout          ;
; |UP3_CLOCK|LessThan~2105                     ; |UP3_CLOCK|LessThan~2105                     ; combout          ;
; |UP3_CLOCK|LessThan~2106                     ; |UP3_CLOCK|LessThan~2106                     ; combout          ;
; |UP3_CLOCK|BCD_DAY0[0]~395                   ; |UP3_CLOCK|BCD_DAY0[0]~395                   ; combout          ;
; |UP3_CLOCK|BCD_HRD0[0]~588                   ; |UP3_CLOCK|BCD_HRD0[0]~588                   ; combout          ;
; |UP3_CLOCK|BCD_HRD1[3]~564                   ; |UP3_CLOCK|BCD_HRD1[3]~564                   ; combout          ;
; |UP3_CLOCK|BCD_HRD1[3]~565                   ; |UP3_CLOCK|BCD_HRD1[3]~565                   ; combout          ;
; |UP3_CLOCK|BCD_HRD1[3]~566                   ; |UP3_CLOCK|BCD_HRD1[3]~566                   ; combout          ;
; |UP3_CLOCK|BCD_HRD1[3]~567                   ; |UP3_CLOCK|BCD_HRD1[3]~567                   ; combout          ;
; |UP3_CLOCK|BCD_HRD1[2]~568                   ; |UP3_CLOCK|BCD_HRD1[2]~568                   ; combout          ;
; |UP3_CLOCK|state2.alarm_hour                 ; |UP3_CLOCK|state2.alarm_hour                 ; regout           ;
; |UP3_CLOCK|BCD_H0[3]~288                     ; |UP3_CLOCK|BCD_H0[3]~288                     ; combout          ;
; |UP3_CLOCK|add~3312                          ; |UP3_CLOCK|add~3312                          ; combout          ;
; |UP3_CLOCK|process5~106                      ; |UP3_CLOCK|process5~106                      ; combout          ;
; |UP3_CLOCK|process5~1                        ; |UP3_CLOCK|process5~1                        ; combout          ;
; |UP3_CLOCK|process5~107                      ; |UP3_CLOCK|process5~107                      ; combout          ;
; |UP3_CLOCK|BCD_H1[3]~4                       ; |UP3_CLOCK|BCD_H1[3]~4                       ; combout          ;
; |UP3_CLOCK|state1.write_min                  ; |UP3_CLOCK|state1.write_min                  ; regout           ;
; |UP3_CLOCK|BCD_MIND1[2]~546                  ; |UP3_CLOCK|BCD_MIND1[2]~546                  ; combout          ;
; |UP3_CLOCK|BCD_MIND1[2]~547                  ; |UP3_CLOCK|BCD_MIND1[2]~547                  ; combout          ;
; |UP3_CLOCK|state2.alarm_min                  ; |UP3_CLOCK|state2.alarm_min                  ; regout           ;
; |UP3_CLOCK|LessThan~2107                     ; |UP3_CLOCK|LessThan~2107                     ; combout          ;
; |UP3_CLOCK|BCD_M1[3]~4                       ; |UP3_CLOCK|BCD_M1[3]~4                       ; combout          ;
; |UP3_CLOCK|process2~2                        ; |UP3_CLOCK|process2~2                        ; combout          ;
; |UP3_CLOCK|BCD_H1[2]~610                     ; |UP3_CLOCK|BCD_H1[2]~610                     ; combout          ;
; |UP3_CLOCK|LessThan~2108                     ; |UP3_CLOCK|LessThan~2108                     ; combout          ;
; |UP3_CLOCK|BCD_S1[3]~4                       ; |UP3_CLOCK|BCD_S1[3]~4                       ; combout          ;
; |UP3_CLOCK|BCD_SECD1[3]~506                  ; |UP3_CLOCK|BCD_SECD1[3]~506                  ; combout          ;
; |UP3_CLOCK|BCD_SECD1[3]~507                  ; |UP3_CLOCK|BCD_SECD1[3]~507                  ; combout          ;
; |UP3_CLOCK|BCD_SECD1[3]~508                  ; |UP3_CLOCK|BCD_SECD1[3]~508                  ; combout          ;
; |UP3_CLOCK|add~3313                          ; |UP3_CLOCK|add~3313                          ; combout          ;
; |UP3_CLOCK|BCD_HRD1[3]~572                   ; |UP3_CLOCK|BCD_HRD1[3]~572                   ; combout          ;
; |UP3_CLOCK|add~3314                          ; |UP3_CLOCK|add~3314                          ; combout          ;
; |UP3_CLOCK|add~3314                          ; |UP3_CLOCK|add~3316                          ; cout             ;
; |UP3_CLOCK|add~3319                          ; |UP3_CLOCK|add~3319                          ; combout          ;
; |UP3_CLOCK|add~3320                          ; |UP3_CLOCK|add~3320                          ; combout          ;
; |UP3_CLOCK|add~3320                          ; |UP3_CLOCK|add~3322                          ; cout0            ;
; |UP3_CLOCK|add~3320                          ; |UP3_CLOCK|add~3322COUT1_3530                ; cout1            ;
; |UP3_CLOCK|add~3325                          ; |UP3_CLOCK|add~3325                          ; combout          ;
; |UP3_CLOCK|add~3326                          ; |UP3_CLOCK|add~3326                          ; combout          ;