up3_clock.map.eqn

用VHDL语言编写的一个闹钟程序

A1L84 = A1L82 & A1L102 & (!A1L375);


--A1L85 is add~3476
--operation mode is arithmetic

A1L85_carry_eqn = A1L89;
A1L85 = A1L87 $ (!A1L85_carry_eqn);

--A1L86 is add~3478
--operation mode is arithmetic

A1L86 = CARRY(!A1L87 & (!A1L89));


--A1L87 is add~3481
--operation mode is normal

A1L87 = A1L85 & A1L102 & (!A1L375);


--A1L88 is add~3482
--operation mode is arithmetic

A1L88_carry_eqn = A1L92;
A1L88 = A1L90 $ (A1L88_carry_eqn);

--A1L89 is add~3484
--operation mode is arithmetic

A1L89 = CARRY(A1L90 # !A1L92);


--A1L90 is add~3487
--operation mode is normal

A1L90 = A1L375 # A1L88 & A1L102;


--A1L91 is add~3488
--operation mode is arithmetic

A1L91_carry_eqn = A1L95;
A1L91 = A1L93 $ (!A1L91_carry_eqn);

--A1L92 is add~3490
--operation mode is arithmetic

A1L92 = CARRY(!A1L93 & (!A1L95));


--A1L93 is add~3493
--operation mode is normal

A1L93 = A1L91 & A1L102 & (!A1L375);


--A1L94 is add~3494
--operation mode is arithmetic

A1L94 = !A1L96;

--A1L95 is add~3496
--operation mode is arithmetic

A1L95 = CARRY(A1L96);


--A1L96 is add~3499
--operation mode is normal

A1L96 = A1L94 & A1L102 & (!A1L375);


--A1L97 is add~3500
--operation mode is normal

A1L97_carry_eqn = A1L5;
A1L97 = A1L98 $ (!A1L97_carry_eqn);


--A1L98 is add~3505
--operation mode is normal

A1L98 = A1L97 & A1L102 & (!A1L375);


--next_command.display_set is next_command.display_set
--operation mode is normal

next_command.display_set_lut_out = state.mode_set # state.return_home # next_command.display_set & !A1L391;
next_command.display_set = DFFEAS(next_command.display_set_lut_out, CLK_400HZ, reset, , , , , , );


--A1L391 is Select~3657
--operation mode is normal

A1L391 = !state.toggle_e & !state.hold;


--next_command.mode_set is next_command.mode_set
--operation mode is normal

next_command.mode_set_lut_out = state.display_on # next_command.mode_set & (state.toggle_e # state.hold);
next_command.mode_set = DFFEAS(next_command.mode_set_lut_out, CLK_400HZ, reset, , , , , , );


--next_command.return_home is next_command.return_home
--operation mode is normal

next_command.return_home_lut_out = state.write_display_char10 # state.write_char18 # next_command.return_home & !A1L391;
next_command.return_home = DFFEAS(next_command.return_home_lut_out, CLK_400HZ, reset, , , , , , );


--next_command.goto_nextline is next_command.goto_nextline
--operation mode is normal

next_command.goto_nextline_lut_out = state.write_char10 # next_command.goto_nextline & (state.toggle_e # state.hold);
next_command.goto_nextline = DFFEAS(next_command.goto_nextline_lut_out, CLK_400HZ, reset, , , , , , );


--next_command.display_off is next_command.display_off
--operation mode is normal

next_command.display_off_lut_out = state.func_set # next_command.display_off & (state.toggle_e # state.hold);
next_command.display_off = DFFEAS(next_command.display_off_lut_out, CLK_400HZ, reset, , , , , , );


--next_command.display_on is next_command.display_on
--operation mode is normal

next_command.display_on_lut_out = state.display_clear # next_command.display_on & (state.toggle_e # state.hold);
next_command.display_on = DFFEAS(next_command.display_on_lut_out, CLK_400HZ, reset, , , , , , );


--next_command.display_clear is next_command.display_clear
--operation mode is normal

next_command.display_clear_lut_out = state.display_off # next_command.display_clear & (state.toggle_e # state.hold);
next_command.display_clear = DFFEAS(next_command.display_clear_lut_out, CLK_400HZ, reset, , , , , , );


--next_command.func_set is next_command.func_set
--operation mode is normal

next_command.func_set_lut_out = state.reset3 # next_command.func_set & (state.toggle_e # state.hold);
next_command.func_set = DFFEAS(next_command.func_set_lut_out, CLK_400HZ, reset, , , , , , );


--next_command.reset2 is next_command.reset2
--operation mode is normal

next_command.reset2_lut_out = state.reset1 & (next_command.reset2 # !state.toggle_e & !state.hold);
next_command.reset2 = DFFEAS(next_command.reset2_lut_out, CLK_400HZ, reset, , , , , , );


--next_command.reset3 is next_command.reset3
--operation mode is normal

next_command.reset3_lut_out = state.reset2 # next_command.reset3 & (state.toggle_e # state.hold);
next_command.reset3 = DFFEAS(next_command.reset3_lut_out, CLK_400HZ, reset, , , , , , );


--CLK_COUNT_400HZ[19] is CLK_COUNT_400HZ[19]
--operation mode is normal

CLK_COUNT_400HZ[19]_carry_eqn = A1L255;
CLK_COUNT_400HZ[19]_lut_out = CLK_COUNT_400HZ[19] $ (CLK_COUNT_400HZ[19]_carry_eqn);
CLK_COUNT_400HZ[19] = DFFEAS(CLK_COUNT_400HZ[19]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );


--CLK_COUNT_400HZ[18] is CLK_COUNT_400HZ[18]
--operation mode is arithmetic

CLK_COUNT_400HZ[18]_carry_eqn = A1L253;
CLK_COUNT_400HZ[18]_lut_out = CLK_COUNT_400HZ[18] $ (!CLK_COUNT_400HZ[18]_carry_eqn);
CLK_COUNT_400HZ[18] = DFFEAS(CLK_COUNT_400HZ[18]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L255 is CLK_COUNT_400HZ[18]~355
--operation mode is arithmetic

A1L255 = CARRY(CLK_COUNT_400HZ[18] & (!A1L253));


--CLK_COUNT_400HZ[16] is CLK_COUNT_400HZ[16]
--operation mode is arithmetic

CLK_COUNT_400HZ[16]_carry_eqn = A1L249;
CLK_COUNT_400HZ[16]_lut_out = CLK_COUNT_400HZ[16] $ (!CLK_COUNT_400HZ[16]_carry_eqn);
CLK_COUNT_400HZ[16] = DFFEAS(CLK_COUNT_400HZ[16]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L251 is CLK_COUNT_400HZ[16]~359
--operation mode is arithmetic

A1L251 = CARRY(CLK_COUNT_400HZ[16] & (!A1L249));


--CLK_COUNT_400HZ[17] is CLK_COUNT_400HZ[17]
--operation mode is arithmetic

CLK_COUNT_400HZ[17]_carry_eqn = A1L251;
CLK_COUNT_400HZ[17]_lut_out = CLK_COUNT_400HZ[17] $ (CLK_COUNT_400HZ[17]_carry_eqn);
CLK_COUNT_400HZ[17] = DFFEAS(CLK_COUNT_400HZ[17]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L253 is CLK_COUNT_400HZ[17]~363
--operation mode is arithmetic

A1L253 = CARRY(!A1L251 # !CLK_COUNT_400HZ[17]);


--CLK_COUNT_400HZ[14] is CLK_COUNT_400HZ[14]
--operation mode is arithmetic

CLK_COUNT_400HZ[14]_carry_eqn = A1L244;
CLK_COUNT_400HZ[14]_lut_out = CLK_COUNT_400HZ[14] $ (!CLK_COUNT_400HZ[14]_carry_eqn);
CLK_COUNT_400HZ[14] = DFFEAS(CLK_COUNT_400HZ[14]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L247 is CLK_COUNT_400HZ[14]~367
--operation mode is arithmetic

A1L247 = CARRY(CLK_COUNT_400HZ[14] & (!A1L244));


--CLK_COUNT_400HZ[12] is CLK_COUNT_400HZ[12]
--operation mode is arithmetic

CLK_COUNT_400HZ[12]_carry_eqn = A1L240;
CLK_COUNT_400HZ[12]_lut_out = CLK_COUNT_400HZ[12] $ (!CLK_COUNT_400HZ[12]_carry_eqn);
CLK_COUNT_400HZ[12] = DFFEAS(CLK_COUNT_400HZ[12]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L242 is CLK_COUNT_400HZ[12]~371
--operation mode is arithmetic

A1L242 = CARRY(CLK_COUNT_400HZ[12] & (!A1L240));


--CLK_COUNT_400HZ[13] is CLK_COUNT_400HZ[13]
--operation mode is arithmetic

CLK_COUNT_400HZ[13]_carry_eqn = A1L242;
CLK_COUNT_400HZ[13]_lut_out = CLK_COUNT_400HZ[13] $ (CLK_COUNT_400HZ[13]_carry_eqn);
CLK_COUNT_400HZ[13] = DFFEAS(CLK_COUNT_400HZ[13]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L244 is CLK_COUNT_400HZ[13]~375
--operation mode is arithmetic

A1L244 = CARRY(!A1L242 # !CLK_COUNT_400HZ[13]);


--CLK_COUNT_400HZ[15] is CLK_COUNT_400HZ[15]
--operation mode is arithmetic

CLK_COUNT_400HZ[15]_carry_eqn = A1L247;
CLK_COUNT_400HZ[15]_lut_out = CLK_COUNT_400HZ[15] $ (CLK_COUNT_400HZ[15]_carry_eqn);
CLK_COUNT_400HZ[15] = DFFEAS(CLK_COUNT_400HZ[15]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L249 is CLK_COUNT_400HZ[15]~379
--operation mode is arithmetic

A1L249 = CARRY(!A1L247 # !CLK_COUNT_400HZ[15]);


--CLK_COUNT_400HZ[5] is CLK_COUNT_400HZ[5]
--operation mode is arithmetic

CLK_COUNT_400HZ[5]_carry_eqn = A1L226;
CLK_COUNT_400HZ[5]_lut_out = CLK_COUNT_400HZ[5] $ (CLK_COUNT_400HZ[5]_carry_eqn);
CLK_COUNT_400HZ[5] = DFFEAS(CLK_COUNT_400HZ[5]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L228 is CLK_COUNT_400HZ[5]~383
--operation mode is arithmetic

A1L228 = CARRY(!A1L226 # !CLK_COUNT_400HZ[5]);


--CLK_COUNT_400HZ[6] is CLK_COUNT_400HZ[6]
--operation mode is arithmetic

CLK_COUNT_400HZ[6]_carry_eqn = A1L228;
CLK_COUNT_400HZ[6]_lut_out = CLK_COUNT_400HZ[6] $ (!CLK_COUNT_400HZ[6]_carry_eqn);
CLK_COUNT_400HZ[6] = DFFEAS(CLK_COUNT_400HZ[6]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L230 is CLK_COUNT_400HZ[6]~387
--operation mode is arithmetic

A1L230 = CARRY(CLK_COUNT_400HZ[6] & (!A1L228));


--CLK_COUNT_400HZ[7] is CLK_COUNT_400HZ[7]
--operation mode is arithmetic

CLK_COUNT_400HZ[7]_carry_eqn = A1L230;
CLK_COUNT_400HZ[7]_lut_out = CLK_COUNT_400HZ[7] $ (CLK_COUNT_400HZ[7]_carry_eqn);
CLK_COUNT_400HZ[7] = DFFEAS(CLK_COUNT_400HZ[7]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L232 is CLK_COUNT_400HZ[7]~391
--operation mode is arithmetic

A1L232 = CARRY(!A1L230 # !CLK_COUNT_400HZ[7]);


--CLK_COUNT_400HZ[8] is CLK_COUNT_400HZ[8]
--operation mode is arithmetic

CLK_COUNT_400HZ[8]_carry_eqn = A1L232;
CLK_COUNT_400HZ[8]_lut_out = CLK_COUNT_400HZ[8] $ (!CLK_COUNT_400HZ[8]_carry_eqn);
CLK_COUNT_400HZ[8] = DFFEAS(CLK_COUNT_400HZ[8]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L234 is CLK_COUNT_400HZ[8]~395
--operation mode is arithmetic

A1L234 = CARRY(CLK_COUNT_400HZ[8] & (!A1L232));


--A1L301 is LessThan~2109
--operation mode is normal

A1L301 = !CLK_COUNT_400HZ[7] & !CLK_COUNT_400HZ[8] & (!CLK_COUNT_400HZ[6] # !CLK_COUNT_400HZ[5]);


--CLK_COUNT_400HZ[9] is CLK_COUNT_400HZ[9]
--operation mode is arithmetic

CLK_COUNT_400HZ[9]_carry_eqn = A1L234;
CLK_COUNT_400HZ[9]_lut_out = CLK_COUNT_400HZ[9] $ (CLK_COUNT_400HZ[9]_carry_eqn);
CLK_COUNT_400HZ[9] = DFFEAS(CLK_COUNT_400HZ[9]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L236 is CLK_COUNT_400HZ[9]~399
--operation mode is arithmetic

A1L236 = CARRY(!A1L234 # !CLK_COUNT_400HZ[9]);


--CLK_COUNT_400HZ[10] is CLK_COUNT_400HZ[10]
--operation mode is arithmetic

CLK_COUNT_400HZ[10]_carry_eqn = A1L236;
CLK_COUNT_400HZ[10]_lut_out = CLK_COUNT_400HZ[10] $ (!CLK_COUNT_400HZ[10]_carry_eqn);
CLK_COUNT_400HZ[10] = DFFEAS(CLK_COUNT_400HZ[10]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L238 is CLK_COUNT_400HZ[10]~403
--operation mode is arithmetic

A1L238 = CARRY(CLK_COUNT_400HZ[10] & (!A1L236));


--CLK_COUNT_400HZ[11] is CLK_COUNT_400HZ[11]
--operation mode is arithmetic

CLK_COUNT_400HZ[11]_carry_eqn = A1L238;
CLK_COUNT_400HZ[11]_lut_out = CLK_COUNT_400HZ[11] $ (CLK_COUNT_400HZ[11]_carry_eqn);
CLK_COUNT_400HZ[11] = DFFEAS(CLK_COUNT_400HZ[11]_lut_out, clk_48Mhz, VCC, , , , , A1L245, );

--A1L240 is CLK_COUNT_400HZ[11]~407
--operation mode is arithmetic

A1L240 = CARRY(!A1L238 # !CLK_COUNT_400HZ[11]);


--A1L302 is LessThan~2110
--operation mode is normal

A1L302 = CLK_COUNT_400HZ[11] & (CLK_COUNT_400HZ[10] # !A1L301 & CLK_COUNT_400HZ[9]);


--A1L303 is LessThan~2111
--operation mode is normal

A1L303 = CLK_COUNT_400HZ[13] & CLK_COUNT_400HZ[15] & (CLK_COUNT_400HZ[12] # A1L302);


--A1L304 is LessThan~2112
--operation mode is normal

A1L304 = !CLK_COUNT_400HZ[16] & !CLK_COUNT_400HZ[17] & (!A1L303 # !CLK_COUNT_400HZ[14]);


--CLK_COUNT_10HZ[6] is CLK_COUNT_10HZ[6]
--operation mode is arithmetic

CLK_COUNT_10HZ[6]_carry_eqn = A1L212;
CLK_COUNT_10HZ[6]_lut_out = CLK_COUNT_10HZ[6] $ (!CLK_COUNT_10HZ[6]_carry_eqn);
CLK_COUNT_10HZ[6] = DFFEAS(CLK_COUNT_10HZ[6]_lut_out, CLK_400HZ, VCC, , reset, , , A1L307, );

--A1L214 is CLK_COUNT_10HZ[6]~298
--operation mode is arithmetic

A1L214 = CARRY(CLK_COUNT_10HZ[6] & (!A1L212));


--CLK_COUNT_10HZ[7] is CLK_COUNT_10HZ[7]
--operation mode is normal

CLK_COUNT_10HZ[7]_carry_eqn = A1L214;
CLK_COUNT_10HZ[7]_lut_out = CLK_COUNT_10HZ[7] $ (CLK_COUNT_10HZ[7]_carry_eqn);
CLK_COUNT_10HZ[7] = DFFEAS(CLK_COUNT_10HZ[7]_lut_out, CLK_400HZ, VCC, , reset, , , A1L307, );


--A1L305 is LessThan~2113
--operation mode is normal

A1L305 = !CLK_COUNT_10HZ[6] & !CLK_COUNT_10HZ[7];


--CLK_COUNT_10HZ[0] is CLK_COUNT_10HZ[0]
--operation mode is arithmetic

CLK_COUNT_10HZ[0]_lut_out = !CLK_COUNT_10HZ[0];
CLK_COUNT_10HZ[0] = DFFEAS(CLK_COUNT_10HZ[0]_lut_out, CLK_400HZ, VCC, , reset, , , A1L307, );

--A1L202 is CLK_COUNT_10HZ[0]~306
--operation mode is arithmetic

A1L202 = CARRY(CLK_COUNT_10HZ[0]);


--CLK_COUNT_10HZ[1] is CLK_COUNT_10HZ[1]
--operation mode is arithmetic

CLK_COUNT_10HZ[1]_carry_eqn = A1L202;
CLK_COUNT_10HZ[1]_lut_out = CLK_COUNT_10HZ[1] $ (CLK_COUNT_10HZ[1]_carry_eqn);
CLK_COUNT_10HZ[1] = DFFEAS(CLK_COUNT_10HZ[1]_lut_out, CLK_400HZ, VCC, , reset, , , A1L307, );

--A1L204 is CLK_COUNT_10HZ[1]~310
--operation mode is arithmetic

A1L204 = CARRY(!A1L202 # !CLK_COUNT_10HZ[1]);


--CLK_COUNT_10HZ[2] is CLK_COUNT_10HZ[2]
--operation mode is arithmetic

CLK_COUNT_10HZ[2]_carry_eqn = A1L204;
CLK_COUNT_10HZ[2]_lut_out = CLK_COUNT_10HZ[2] $ (!CLK_COUNT_10HZ[2]_carry_eqn);
CLK_COUNT_10HZ[2] = DFFEAS(CLK_COUNT_10HZ[2]_lut_out, CLK_400HZ, VCC, , reset, , , A1L307, );

--A1L206 is CLK_COUNT_10HZ[2]~314
--operation mode is arithmetic

A1L206 = CARRY(CLK_COUNT_10HZ[2] & (!A1L204));


--CLK_COUNT_10HZ[3] is CLK_COUNT_10HZ[3]
--operation mode is arithmetic

CLK_COUNT_10HZ[3]_carry_eqn = A1L206;
CLK_COUNT_10HZ[3]_lut_out = CLK_COUNT_10HZ[3] $ (CLK_COUNT_10HZ[3]_carry_eqn);
CLK_COUNT_10HZ[3] = DFFEAS(CLK_COUNT_10HZ[3]_lut_out, CLK_400HZ, VCC, , reset, , , A1L307, );

--A1L208 is CLK_COUNT_10HZ[3]~318
--operation mode is arithmetic

A1L208 = CARRY(!A1L206 # !CLK_COUNT_10HZ[3]);


--A1L306 is LessThan~2114
--operation mode is normal

A1L306 = !CLK_COUNT_10HZ[2] & !CLK_COUNT_10HZ[3] & (!CLK_COUNT_10HZ[1] # !CLK_COUNT_10HZ[0]);


--CLK_COUNT_10HZ[4] is CLK_COUNT_10HZ[4]
--operation mode is arithmetic

CLK_COUNT_10HZ[4]_carry_eqn = A1L208;
CLK_COUNT_10HZ[4]_lut_out = CLK_COUNT_10HZ[4] $ (!CLK_COUNT_10HZ[4]_carry_eqn);
CLK_COUNT_10HZ[4] = DFFEAS(CLK_COUNT_10HZ[4]_lut_out, CLK_400HZ, VCC, , reset, , , A1L307, );

--A1L210 is CLK_COUNT_10HZ[4]~322
--operation mode is arithmetic

A1L210 = CARRY(CLK_COUNT_10HZ[4] & (!A1L208));


--CLK_COUNT_10HZ[5] is CLK_COUNT_10HZ[5]
--operation mode is arithmetic

CLK_COUNT_10HZ[5]_carry_eqn = A1L210;
CLK_COUNT_10HZ[5]_lut_out = CLK_COUNT_10HZ[5] $ (CLK_COUNT_10HZ[5]_carry_eqn);
CLK_COUNT_10HZ[5] = DFFEAS(CLK_COUNT_10HZ[5]_lut_out, CLK_400HZ, VCC, , reset, , , A1L307, );

--A1L212 is CLK_COUNT_10HZ[5]~326
--operation mode is arithmetic

A1L212 = CARRY(!A1L210 # !CLK_COUNT_10HZ[5]);


--A1L307 is LessThan~2115
--operation mode is normal

A1L307 = CLK_COUNT_10HZ[5] # !A1L306 & CLK_COUNT_10HZ[4] # !A1L305;


--A1L392 is Select~3658
--operation mode is normal

A1L392 = state1.write_sec & SET_CHANGE & SET_ADD;