up3_clock.map.eqn

用VHDL语言编写的一个闹钟程序

A1L377 = BCD_SECD1[2] & (BCD_S1[2] $ (BCD_S1[1] & BCD_S1[0])) # !BCD_SECD1[2] & !BCD_S1[2] & (!BCD_S1[0] # !BCD_S1[1]);


--A1L378 is process3~371
--operation mode is normal

A1L378 = BCD_SECD1[0] & !BCD_S1[0] & (BCD_S1[1] $ !BCD_SECD1[1]) # !BCD_SECD1[0] & BCD_S1[0] & (BCD_S1[1] $ BCD_SECD1[1]);


--A1L380 is process4~60
--operation mode is normal

A1L380 = !BCD_SECD1[1] & !BCD_SECD1[0] & !BCD_SECD1[2];


--A1L379 is process3~372
--operation mode is normal

A1L379 = BCD_S1[0] & BCD_S1[2] & A1L380 & !BCD_S1[1];


--A1L101 is ALARM_LED~164
--operation mode is normal

A1L101 = !A1L379 & (!A1L378 # !A1L377) # !A1L362;


--A1L102 is ALARM_LED~165
--operation mode is normal

A1L102 = CLOSE_ALARM & A1L376 & A1L101;


--A1L158 is BCD_MIND0[2]~515
--operation mode is normal

A1L158 = !BCD_MIND0[2] & !BCD_MIND0[0] & !BCD_MIND0[1];


--A1L381 is process4~61
--operation mode is normal

A1L381 = A1L380 & A1L158 & !BCD_SECD0[3] & !BCD_MIND1[2];


--A1L183 is BCD_SECD0[2]~458
--operation mode is normal

A1L183 = !BCD_SECD0[0] & !BCD_SECD0[1] & !BCD_SECD0[2];


--A1L382 is process4~62
--operation mode is normal

A1L382 = !BCD_MIND1[1] & !BCD_MIND1[0] & !GIVE_TIME;


--A1L383 is process4~63
--operation mode is normal

A1L383 = A1L381 & A1L183 & A1L382 & !BCD_MIND0[3];


--state.display_set is state.display_set
--operation mode is normal

state.display_set_lut_out = state.hold & next_command.display_set;
state.display_set = DFFEAS(state.display_set_lut_out, CLK_400HZ, reset, , , , , , );


--state.toggle_e is state.toggle_e
--operation mode is normal

state.toggle_e_lut_out = A1L391;
state.toggle_e = DFFEAS(state.toggle_e_lut_out, CLK_400HZ, reset, , , , , , );


--state.hold is state.hold
--operation mode is normal

state.hold_lut_out = state.toggle_e;
state.hold = DFFEAS(state.hold_lut_out, CLK_400HZ, reset, , , , , , );


--A1L387 is reduce_or~121
--operation mode is normal

A1L387 = !state.display_set & !state.toggle_e & !state.hold;


--state.mode_set is state.mode_set
--operation mode is normal

state.mode_set_lut_out = state.hold & next_command.mode_set;
state.mode_set = DFFEAS(state.mode_set_lut_out, CLK_400HZ, reset, , , , , , );


--state.return_home is state.return_home
--operation mode is normal

state.return_home_lut_out = state.hold & next_command.return_home;
state.return_home = DFFEAS(state.return_home_lut_out, CLK_400HZ, reset, , , , , , );


--state.goto_nextline is state.goto_nextline
--operation mode is normal

state.goto_nextline_lut_out = state.hold & next_command.goto_nextline;
state.goto_nextline = DFFEAS(state.goto_nextline_lut_out, CLK_400HZ, reset, , , , , , );


--state.display_off is state.display_off
--operation mode is normal

state.display_off_lut_out = state.hold & next_command.display_off;
state.display_off = DFFEAS(state.display_off_lut_out, CLK_400HZ, reset, , , , , , );


--A1L453 is state.display_set~96
--operation mode is normal

A1L453 = !state.mode_set & !state.return_home & !state.goto_nextline & !state.display_off;


--state.display_on is state.display_on
--operation mode is normal

state.display_on_lut_out = state.hold & next_command.display_on;
state.display_on = DFFEAS(state.display_on_lut_out, CLK_400HZ, reset, , , , , , );


--state.display_clear is state.display_clear
--operation mode is normal

state.display_clear_lut_out = state.hold & next_command.display_clear;
state.display_clear = DFFEAS(state.display_clear_lut_out, CLK_400HZ, reset, , , , , , );


--A1L454 is state.display_set~97
--operation mode is normal

A1L454 = A1L387 & A1L453 & !state.display_on & !state.display_clear;


--state.reset1 is state.reset1
--operation mode is normal

state.reset1_lut_out = VCC;
state.reset1 = DFFEAS(state.reset1_lut_out, CLK_400HZ, reset, , , , , , );


--state.func_set is state.func_set
--operation mode is normal

state.func_set_lut_out = state.hold & next_command.func_set;
state.func_set = DFFEAS(state.func_set_lut_out, CLK_400HZ, reset, , , , , , );


--state.reset2 is state.reset2
--operation mode is normal

state.reset2_lut_out = !next_command.reset2 & (state.hold);
state.reset2 = DFFEAS(state.reset2_lut_out, CLK_400HZ, reset, , , , , , );


--state.reset3 is state.reset3
--operation mode is normal

state.reset3_lut_out = state.hold & next_command.reset3;
state.reset3 = DFFEAS(state.reset3_lut_out, CLK_400HZ, reset, , , , , , );


--A1L455 is state.display_set~98
--operation mode is normal

A1L455 = state.reset1 & !state.func_set & !state.reset2 & !state.reset3;


--CLK_400HZ is CLK_400HZ
--operation mode is normal

CLK_400HZ_lut_out = CLK_400HZ $ (CLK_COUNT_400HZ[19] # CLK_COUNT_400HZ[18] # !A1L304);
CLK_400HZ = DFFEAS(CLK_400HZ_lut_out, clk_48Mhz, VCC, , , , , !reset, );


--CLK_10HZ is CLK_10HZ
--operation mode is normal

CLK_10HZ_lut_out = CLK_10HZ $ (A1L307 & (reset));
CLK_10HZ = DFFEAS(CLK_10HZ_lut_out, CLK_400HZ, VCC, , , , , , );


--state1.write_sec is state1.write_sec
--operation mode is normal

state1.write_sec_lut_out = A1L392 # state1.hold1 & next_command1.write_sec;
state1.write_sec = DFFEAS(state1.write_sec_lut_out, CLK_10HZ, reset, , A1L355, , , , );


--A1L180 is BCD_SECD0[1]~460
--operation mode is normal

A1L180 = !SET_TIME & (SET_MOD # !SET_CHANGE # !state1.write_sec);


--BCD_TSEC[2] is BCD_TSEC[2]
--operation mode is normal

BCD_TSEC[2]_lut_out = !BCD_TSEC[3] & (BCD_TSEC[2] $ (BCD_TSEC[1] & BCD_TSEC[0]));
BCD_TSEC[2] = DFFEAS(BCD_TSEC[2]_lut_out, CLK_10HZ, reset, , SET_TIME, , , , );


--BCD_TSEC[1] is BCD_TSEC[1]
--operation mode is normal

BCD_TSEC[1]_lut_out = !BCD_TSEC[3] & (BCD_TSEC[1] $ BCD_TSEC[0]);
BCD_TSEC[1] = DFFEAS(BCD_TSEC[1]_lut_out, CLK_10HZ, reset, , SET_TIME, , , , );


--BCD_TSEC[0] is BCD_TSEC[0]
--operation mode is normal

BCD_TSEC[0]_lut_out = !BCD_TSEC[0] & (!BCD_TSEC[2] & !BCD_TSEC[1] # !BCD_TSEC[3]);
BCD_TSEC[0] = DFFEAS(BCD_TSEC[0]_lut_out, CLK_10HZ, reset, , SET_TIME, , , , );


--BCD_TSEC[3] is BCD_TSEC[3]
--operation mode is normal

BCD_TSEC[3]_lut_out = BCD_TSEC[3] & !BCD_TSEC[2] & !BCD_TSEC[1] & !BCD_TSEC[0] # !BCD_TSEC[3] & BCD_TSEC[2] & BCD_TSEC[1] & BCD_TSEC[0];
BCD_TSEC[3] = DFFEAS(BCD_TSEC[3]_lut_out, CLK_10HZ, reset, , SET_TIME, , , , );


--A1L294 is LessThan~2102
--operation mode is normal

A1L294 = !BCD_TSEC[2] & !BCD_TSEC[1] & !BCD_TSEC[0] # !BCD_TSEC[3];


--A1L355 is process2~0
--operation mode is normal

A1L355 = !SET_TIME & !SET_MOD;


--A1L181 is BCD_SECD0[1]~461
--operation mode is normal

A1L181 = !A1L180 & (A1L355 & (!SET_ADD) # !A1L355 & !A1L294);


--state2.alarm_sec is state2.alarm_sec
--operation mode is normal

state2.alarm_sec_lut_out = A1L393 # state2.hold2 & next_command2.alarm_sec;
state2.alarm_sec = DFFEAS(state2.alarm_sec_lut_out, CLK_10HZ, reset, , A1L354, , , , );


--A1L137 is BCD_HRD1[3]~563
--operation mode is normal

A1L137 = SET_CHANGE & (!SET_ADD);


--A1L354 is process1~0
--operation mode is normal

A1L354 = SET_MOD & (!SET_TIME);


--A1L357 is process2~121
--operation mode is normal

A1L357 = !BCD_HRD0[0] & !BCD_HRD0[2] & !BCD_HRD0[1] # !BCD_HRD0[3];


--A1L1 is add~3311
--operation mode is normal

A1L1 = BCD_HRD0[0] & BCD_HRD0[1];


--A1L358 is process2~122
--operation mode is normal

A1L358 = !BCD_HRD1[2] & !BCD_HRD1[0];


--A1L359 is process2~123
--operation mode is normal

A1L359 = BCD_HRD1[1] & !BCD_HRD1[3] & !BCD_HRD0[2] & !BCD_HRD0[3];


--A1L360 is process2~124
--operation mode is normal

A1L360 = A1L357 & (!A1L359 # !A1L358 # !A1L1);


--state1.write_hour is state1.write_hour
--operation mode is normal

state1.write_hour_lut_out = !next_command1.write_hour # !state1.hold1;
state1.write_hour = DFFEAS(state1.write_hour_lut_out, CLK_10HZ, reset, , A1L355, , , , );


--A1L295 is LessThan~2103
--operation mode is normal

A1L295 = !BCD_SECD0[0] & !BCD_SECD0[1] & !BCD_SECD0[2] # !BCD_SECD0[3];


--A1L296 is LessThan~2104
--operation mode is normal

A1L296 = !BCD_SECD1[1] & !BCD_SECD1[0] # !BCD_SECD1[2];


--A1L107 is BCD_DAY0[0]~394
--operation mode is normal

A1L107 = SET_TIME & !A1L295 & !A1L294 & !A1L296;


--A1L297 is LessThan~2105
--operation mode is normal

A1L297 = !BCD_MIND0[2] & !BCD_MIND0[0] & !BCD_MIND0[1] # !BCD_MIND0[3];


--A1L298 is LessThan~2106
--operation mode is normal

A1L298 = !BCD_MIND1[1] & !BCD_MIND1[0] # !BCD_MIND1[2];


--A1L108 is BCD_DAY0[0]~395
--operation mode is normal

A1L108 = A1L107 & (!A1L297 & !A1L298);


--A1L127 is BCD_HRD0[0]~588
--operation mode is normal

A1L127 = A1L355 & !state1.write_hour & A1L137 # !A1L355 & (A1L108);


--A1L138 is BCD_HRD1[3]~564
--operation mode is normal

A1L138 = SET_ADD # state1.write_hour # !SET_CHANGE;


--A1L139 is BCD_HRD1[3]~565
--operation mode is normal

A1L139 = A1L355 & A1L138 # !A1L355 & (A1L294 # A1L297);


--A1L140 is BCD_HRD1[3]~566
--operation mode is normal

A1L140 = !A1L355 & (A1L295 # A1L296 # A1L298);


--A1L141 is BCD_HRD1[3]~567
--operation mode is normal

A1L141 = A1L360 # A1L140 # SET_MOD & !SET_TIME;


--A1L135 is BCD_HRD1[2]~568
--operation mode is normal

A1L135 = BCD_HRD1[0] & BCD_HRD1[1] & !A1L139 & !A1L141;


--state2.alarm_hour is state2.alarm_hour
--operation mode is normal

state2.alarm_hour_lut_out = !next_command2.alarm_hour # !state2.hold2;
state2.alarm_hour = DFFEAS(state2.alarm_hour_lut_out, CLK_10HZ, reset, , A1L354, , , , );


--A1L117 is BCD_H0[3]~288
--operation mode is normal

A1L117 = SET_MOD & A1L137 & !SET_TIME & !state2.alarm_hour;


--A1L2 is add~3312
--operation mode is normal

A1L2 = BCD_H0[0] & BCD_H0[1];


--A1L385 is process5~106
--operation mode is normal

A1L385 = BCD_H1[1] & !BCD_H1[3] & !BCD_H0[2] & !BCD_H0[3];


--A1L384 is process5~1
--operation mode is normal

A1L384 = A1L2 & A1L385 & !BCD_H1[2] & !BCD_H1[0];


--A1L386 is process5~107
--operation mode is normal

A1L386 = !BCD_H0[0] & !BCD_H0[2] & !BCD_H0[1] # !BCD_H0[3];


--A1L124 is BCD_H1[3]~4
--operation mode is normal

A1L124 = A1L117 & (A1L384 # !A1L386);


--state1.write_min is state1.write_min
--operation mode is normal

state1.write_min_lut_out = state1.hold1 & (!next_command1.write_min);
state1.write_min = DFFEAS(state1.write_min_lut_out, CLK_10HZ, reset, , A1L355, , , , );


--A1L164 is BCD_MIND1[2]~546
--operation mode is normal

A1L164 = A1L355 & (A1L137 & state1.write_min) # !A1L355 & A1L107;


--A1L165 is BCD_MIND1[2]~547
--operation mode is normal

A1L165 = !A1L297 & (A1L164);


--state2.alarm_min is state2.alarm_min
--operation mode is normal

state2.alarm_min_lut_out = state2.hold2 & (!next_command2.alarm_min);
state2.alarm_min = DFFEAS(state2.alarm_min_lut_out, CLK_10HZ, reset, , A1L354, , , , );


--A1L299 is LessThan~2107
--operation mode is normal

A1L299 = !BCD_M0[2] & !BCD_M0[0] & !BCD_M0[1] # !BCD_M0[3];


--A1L153 is BCD_M1[3]~4
--operation mode is normal

A1L153 = A1L137 & A1L354 & state2.alarm_min & !A1L299;


--A1L356 is process2~2
--operation mode is normal

A1L356 = A1L1 & A1L359 & !BCD_HRD1[2] & !BCD_HRD1[0];


--A1L122 is BCD_H1[2]~610
--operation mode is normal

A1L122 = BCD_H1[0] & BCD_H1[1];


--A1L300 is LessThan~2108
--operation mode is normal

A1L300 = !BCD_S0[1] & !BCD_S0[2] & !BCD_S0[0] # !BCD_S0[3];


--A1L175 is BCD_S1[3]~4
--operation mode is normal

A1L175 = state2.alarm_sec & A1L137 & A1L354 & !A1L300;


--A1L189 is BCD_SECD1[3]~506
--operation mode is normal

A1L189 = SET_ADD # !SET_CHANGE # !state1.write_sec;


--A1L190 is BCD_SECD1[3]~507
--operation mode is normal

A1L190 = SET_TIME & (!A1L294);


--A1L191 is BCD_SECD1[3]~508
--operation mode is normal