display.tan.summary

用 vhdl 语言编写的1602的小程序

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 8.168 ns
From           : RES
To             : CLK_COUNT_400HZ[0]
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 14.246 ns
From           : LCD_RS~reg0
To             : LCD_RS
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.260 ns
From           : DS0
To             : next_command.write3_char1
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'CLK'
Slack          : N/A
Required Time  : None
Actual Time    : 137.78 MHz ( period = 7.258 ns )
From           : CLK_COUNT_400HZ[6]
To             : CLK_COUNT_400HZ[5]
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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