display.map.eqn

用 vhdl 语言编写的1602的小程序

A1L21 = CARRY(CLK_COUNT_400HZ[8] & (!A1L19));


--A1L70 is LessThan~412
--operation mode is normal

A1L70 = !CLK_COUNT_400HZ[7] & !CLK_COUNT_400HZ[8] & (!CLK_COUNT_400HZ[6] # !CLK_COUNT_400HZ[5]);


--CLK_COUNT_400HZ[9] is CLK_COUNT_400HZ[9]
--operation mode is arithmetic

CLK_COUNT_400HZ[9]_carry_eqn = A1L21;
CLK_COUNT_400HZ[9]_lut_out = CLK_COUNT_400HZ[9] $ (CLK_COUNT_400HZ[9]_carry_eqn);
CLK_COUNT_400HZ[9] = DFFEAS(CLK_COUNT_400HZ[9]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L23 is CLK_COUNT_400HZ[9]~369
--operation mode is arithmetic

A1L23 = CARRY(!A1L21 # !CLK_COUNT_400HZ[9]);


--CLK_COUNT_400HZ[12] is CLK_COUNT_400HZ[12]
--operation mode is arithmetic

CLK_COUNT_400HZ[12]_carry_eqn = A1L27;
CLK_COUNT_400HZ[12]_lut_out = CLK_COUNT_400HZ[12] $ (!CLK_COUNT_400HZ[12]_carry_eqn);
CLK_COUNT_400HZ[12] = DFFEAS(CLK_COUNT_400HZ[12]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L29 is CLK_COUNT_400HZ[12]~373
--operation mode is arithmetic

A1L29 = CARRY(CLK_COUNT_400HZ[12] & (!A1L27));


--CLK_COUNT_400HZ[10] is CLK_COUNT_400HZ[10]
--operation mode is arithmetic

CLK_COUNT_400HZ[10]_carry_eqn = A1L23;
CLK_COUNT_400HZ[10]_lut_out = CLK_COUNT_400HZ[10] $ (!CLK_COUNT_400HZ[10]_carry_eqn);
CLK_COUNT_400HZ[10] = DFFEAS(CLK_COUNT_400HZ[10]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L25 is CLK_COUNT_400HZ[10]~377
--operation mode is arithmetic

A1L25 = CARRY(CLK_COUNT_400HZ[10] & (!A1L23));


--A1L71 is LessThan~413
--operation mode is normal

A1L71 = !CLK_COUNT_400HZ[12] & !CLK_COUNT_400HZ[10] & (A1L70 # !CLK_COUNT_400HZ[9]);


--CLK_COUNT_400HZ[11] is CLK_COUNT_400HZ[11]
--operation mode is arithmetic

CLK_COUNT_400HZ[11]_carry_eqn = A1L25;
CLK_COUNT_400HZ[11]_lut_out = CLK_COUNT_400HZ[11] $ (CLK_COUNT_400HZ[11]_carry_eqn);
CLK_COUNT_400HZ[11] = DFFEAS(CLK_COUNT_400HZ[11]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L27 is CLK_COUNT_400HZ[11]~381
--operation mode is arithmetic

A1L27 = CARRY(!A1L25 # !CLK_COUNT_400HZ[11]);


--CLK_COUNT_400HZ[13] is CLK_COUNT_400HZ[13]
--operation mode is arithmetic

CLK_COUNT_400HZ[13]_carry_eqn = A1L29;
CLK_COUNT_400HZ[13]_lut_out = CLK_COUNT_400HZ[13] $ (CLK_COUNT_400HZ[13]_carry_eqn);
CLK_COUNT_400HZ[13] = DFFEAS(CLK_COUNT_400HZ[13]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L31 is CLK_COUNT_400HZ[13]~385
--operation mode is arithmetic

A1L31 = CARRY(!A1L29 # !CLK_COUNT_400HZ[13]);


--CLK_COUNT_400HZ[14] is CLK_COUNT_400HZ[14]
--operation mode is arithmetic

CLK_COUNT_400HZ[14]_carry_eqn = A1L31;
CLK_COUNT_400HZ[14]_lut_out = CLK_COUNT_400HZ[14] $ (!CLK_COUNT_400HZ[14]_carry_eqn);
CLK_COUNT_400HZ[14] = DFFEAS(CLK_COUNT_400HZ[14]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L33 is CLK_COUNT_400HZ[14]~389
--operation mode is arithmetic

A1L33 = CARRY(CLK_COUNT_400HZ[14] & (!A1L31));


--A1L72 is LessThan~414
--operation mode is normal

A1L72 = !CLK_COUNT_400HZ[12] & !CLK_COUNT_400HZ[11] # !CLK_COUNT_400HZ[14] # !CLK_COUNT_400HZ[13];


--CLK_COUNT_400HZ[15] is CLK_COUNT_400HZ[15]
--operation mode is arithmetic

CLK_COUNT_400HZ[15]_carry_eqn = A1L33;
CLK_COUNT_400HZ[15]_lut_out = CLK_COUNT_400HZ[15] $ (CLK_COUNT_400HZ[15]_carry_eqn);
CLK_COUNT_400HZ[15] = DFFEAS(CLK_COUNT_400HZ[15]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L35 is CLK_COUNT_400HZ[15]~393
--operation mode is arithmetic

A1L35 = CARRY(!A1L33 # !CLK_COUNT_400HZ[15]);


--A1L73 is LessThan~415
--operation mode is normal

A1L73 = A1L69 & (A1L71 # A1L72 # !CLK_COUNT_400HZ[15]);


--DATA_BUS_VALUE[0] is DATA_BUS_VALUE[0]
--operation mode is normal

DATA_BUS_VALUE[0]_lut_out = A1L105 # A1L106 # DATA_BUS_VALUE[0] & !A1L100;
DATA_BUS_VALUE[0] = DFFEAS(DATA_BUS_VALUE[0]_lut_out, CLK_400HZ, !RES, , , , , , );


--DATA_BUS_VALUE[1] is DATA_BUS_VALUE[1]
--operation mode is normal

DATA_BUS_VALUE[1]_lut_out = A1L108 # DATA_BUS_VALUE[1] & (!A1L100);
DATA_BUS_VALUE[1] = DFFEAS(DATA_BUS_VALUE[1]_lut_out, CLK_400HZ, !RES, , , , , , );


--DATA_BUS_VALUE[2] is DATA_BUS_VALUE[2]
--operation mode is normal

DATA_BUS_VALUE[2]_lut_out = A1L109 # A1L110 # DATA_BUS_VALUE[2] & !A1L100;
DATA_BUS_VALUE[2] = DFFEAS(DATA_BUS_VALUE[2]_lut_out, CLK_400HZ, !RES, , , , , , );


--DATA_BUS_VALUE[3] is DATA_BUS_VALUE[3]
--operation mode is normal

DATA_BUS_VALUE[3]_lut_out = !state.write2_char3 & !A1L111 & !A1L112 & A1L113;
DATA_BUS_VALUE[3] = DFFEAS(DATA_BUS_VALUE[3]_lut_out, CLK_400HZ, !RES, , , , , , );


--DATA_BUS_VALUE[4] is DATA_BUS_VALUE[4]
--operation mode is normal

DATA_BUS_VALUE[4]_lut_out = !A1L114 & (state.write_char7 # state.write_char4 # !A1L119);
DATA_BUS_VALUE[4] = DFFEAS(DATA_BUS_VALUE[4]_lut_out, CLK_400HZ, !RES, , , , , , );


--DATA_BUS_VALUE[5] is DATA_BUS_VALUE[5]
--operation mode is normal

DATA_BUS_VALUE[5]_lut_out = A1L119 & state.write_char7 & (A1L100 # DATA_BUS_VALUE[5]) # !A1L119 & (A1L100 # DATA_BUS_VALUE[5]);
DATA_BUS_VALUE[5] = DFFEAS(DATA_BUS_VALUE[5]_lut_out, CLK_400HZ, !RES, , , , , , );


--DATA_BUS_VALUE[6] is DATA_BUS_VALUE[6]
--operation mode is normal

DATA_BUS_VALUE[6]_lut_out = state.goto_nextline # state.write_char7 # DATA_BUS_VALUE[6] & !A1L100;
DATA_BUS_VALUE[6] = DFFEAS(DATA_BUS_VALUE[6]_lut_out, CLK_400HZ, !RES, , , , , , );


--DATA_BUS_VALUE[7] is DATA_BUS_VALUE[7]
--operation mode is normal

DATA_BUS_VALUE[7]_lut_out = state.return_home # state.goto_nextline # DATA_BUS_VALUE[7] & !A1L100;
DATA_BUS_VALUE[7] = DFFEAS(DATA_BUS_VALUE[7]_lut_out, CLK_400HZ, !RES, , , , , , );


--state.write_char7 is state.write_char7
--operation mode is normal

state.write_char7_lut_out = state.hold & next_command.write_char7;
state.write_char7 = DFFEAS(state.write_char7_lut_out, CLK_400HZ, !RES, , , , , , );


--state.write1_char3 is state.write1_char3
--operation mode is normal

state.write1_char3_lut_out = state.hold & next_command.write1_char3;
state.write1_char3 = DFFEAS(state.write1_char3_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L103 is Select~2557
--operation mode is normal

A1L103 = next_command.goto_nextline & (state.toggle_e # state.hold);


--state.write2_char3 is state.write2_char3
--operation mode is normal

state.write2_char3_lut_out = state.hold & next_command.write2_char3;
state.write2_char3 = DFFEAS(state.write2_char3_lut_out, CLK_400HZ, !RES, , , , , , );


--state.write_char3 is state.write_char3
--operation mode is normal

state.write_char3_lut_out = state.hold & next_command.write_char3;
state.write_char3 = DFFEAS(state.write_char3_lut_out, CLK_400HZ, !RES, , , , , , );


--state.write3_char3 is state.write3_char3
--operation mode is normal

state.write3_char3_lut_out = state.hold & next_command.write3_char3;
state.write3_char3 = DFFEAS(state.write3_char3_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L104 is Select~2558
--operation mode is normal

A1L104 = !state.write_char3 & !state.write3_char3;


--A1L43 is CLK_COUNT_400HZ[19]~396
--operation mode is normal

A1L43 = RES # !A1L73;


--CLK_COUNT_400HZ[4] is CLK_COUNT_400HZ[4]
--operation mode is arithmetic

CLK_COUNT_400HZ[4]_carry_eqn = A1L11;
CLK_COUNT_400HZ[4]_lut_out = CLK_COUNT_400HZ[4] $ (!CLK_COUNT_400HZ[4]_carry_eqn);
CLK_COUNT_400HZ[4] = DFFEAS(CLK_COUNT_400HZ[4]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L13 is CLK_COUNT_400HZ[4]~398
--operation mode is arithmetic

A1L13 = CARRY(CLK_COUNT_400HZ[4] & (!A1L11));


--state.write3_char1 is state.write3_char1
--operation mode is normal

state.write3_char1_lut_out = state.hold & next_command.write3_char1;
state.write3_char1 = DFFEAS(state.write3_char1_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L105 is Select~2563
--operation mode is normal

A1L105 = state.display_clear # state.write_char7 # state.write3_char3 # state.write3_char1;


--state.write_char2 is state.write_char2
--operation mode is normal

state.write_char2_lut_out = state.hold & next_command.write_char2;
state.write_char2 = DFFEAS(state.write_char2_lut_out, CLK_400HZ, !RES, , , , , , );


--state.write1_char1 is state.write1_char1
--operation mode is normal

state.write1_char1_lut_out = state.hold & next_command.write1_char1;
state.write1_char1 = DFFEAS(state.write1_char1_lut_out, CLK_400HZ, !RES, , , , , , );


--state.write2_char2 is state.write2_char2
--operation mode is normal

state.write2_char2_lut_out = state.hold & next_command.write2_char2;
state.write2_char2 = DFFEAS(state.write2_char2_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L106 is Select~2564
--operation mode is normal

A1L106 = state.write1_char3 # state.write_char2 # state.write1_char1 # state.write2_char2;


--state.write3_char2 is state.write3_char2
--operation mode is normal

state.write3_char2_lut_out = state.hold & next_command.write3_char2;
state.write3_char2 = DFFEAS(state.write3_char2_lut_out, CLK_400HZ, !RES, , , , , , );


--state.write2_char1 is state.write2_char1
--operation mode is normal

state.write2_char1_lut_out = state.hold & next_command.write2_char1;
state.write2_char1 = DFFEAS(state.write2_char1_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L107 is Select~2566
--operation mode is normal

A1L107 = !state.mode_set & !state.write2_char2 & !state.write2_char1;


--A1L108 is Select~2567
--operation mode is normal

A1L108 = state.write1_char1 # state.write3_char2 # !A1L107 # !A1L104;


--A1L109 is Select~2569
--operation mode is normal

A1L109 = state.display_on # state.mode_set # state.write2_char2 # state.write2_char1;


--state.write_char5 is state.write_char5
--operation mode is normal

state.write_char5_lut_out = state.hold & next_command.write_char5;
state.write_char5 = DFFEAS(state.write_char5_lut_out, CLK_400HZ, !RES, , , , , , );


--state.write1_char2 is state.write1_char2
--operation mode is normal

state.write1_char2_lut_out = state.hold & next_command.write1_char2;
state.write1_char2 = DFFEAS(state.write1_char2_lut_out, CLK_400HZ, !RES, , , , , , );