display.map.eqn

用 vhdl 语言编写的1602的小程序

-- Copyright (C) 1991-2006 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--A1L67Q is LCD_RS~reg0
--operation mode is normal

A1L67Q_lut_out = A1L119 & (A1L120 # A1L67Q & !A1L100) # !A1L119 & (A1L67Q & !A1L100);
A1L67Q = DFFEAS(A1L67Q_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L65Q is LCD_E~reg0
--operation mode is normal

A1L65Q_lut_out = state.display_set & (A1L65Q) # !state.display_set & (state.hold & (A1L65Q) # !state.hold & state.toggle_e);
A1L65Q = DFFEAS(A1L65Q_lut_out, CLK_400HZ, !RES, , , , , , );


--state.display_set is state.display_set
--operation mode is normal

state.display_set_lut_out = state.hold & next_command.display_set;
state.display_set = DFFEAS(state.display_set_lut_out, CLK_400HZ, !RES, , , , , , );


--state.toggle_e is state.toggle_e
--operation mode is normal

state.toggle_e_lut_out = A1L102;
state.toggle_e = DFFEAS(state.toggle_e_lut_out, CLK_400HZ, !RES, , , , , , );


--state.hold is state.hold
--operation mode is normal

state.hold_lut_out = state.toggle_e & (!state.hold);
state.hold = DFFEAS(state.hold_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L100 is reduce_or~91
--operation mode is normal

A1L100 = !state.display_set & !state.toggle_e & !state.hold;


--state.display_on is state.display_on
--operation mode is normal

state.display_on_lut_out = state.hold & next_command.display_on;
state.display_on = DFFEAS(state.display_on_lut_out, CLK_400HZ, !RES, , , , , , );


--state.display_off is state.display_off
--operation mode is normal

state.display_off_lut_out = state.hold & next_command.display_off;
state.display_off = DFFEAS(state.display_off_lut_out, CLK_400HZ, !RES, , , , , , );


--state.mode_set is state.mode_set
--operation mode is normal

state.mode_set_lut_out = state.hold & next_command.mode_set;
state.mode_set = DFFEAS(state.mode_set_lut_out, CLK_400HZ, !RES, , , , , , );


--state.return_home is state.return_home
--operation mode is normal

state.return_home_lut_out = state.hold & next_command.return_home;
state.return_home = DFFEAS(state.return_home_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L118 is state.display_clear~86
--operation mode is normal

A1L118 = !state.display_on & !state.display_off & !state.mode_set & !state.return_home;


--state.display_clear is state.display_clear
--operation mode is normal

state.display_clear_lut_out = state.hold & next_command.display_clear;
state.display_clear = DFFEAS(state.display_clear_lut_out, CLK_400HZ, !RES, , , , , , );


--state.goto_nextline is state.goto_nextline
--operation mode is normal

state.goto_nextline_lut_out = state.hold & next_command.goto_nextline;
state.goto_nextline = DFFEAS(state.goto_nextline_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L119 is state.display_clear~87
--operation mode is normal

A1L119 = A1L100 & A1L118 & !state.display_clear & !state.goto_nextline;


--state.reset1 is state.reset1
--operation mode is normal

state.reset1_lut_out = VCC;
state.reset1 = DFFEAS(state.reset1_lut_out, CLK_400HZ, !RES, , , , , , );


--state.func_set is state.func_set
--operation mode is normal

state.func_set_lut_out = state.hold & next_command.func_set;
state.func_set = DFFEAS(state.func_set_lut_out, CLK_400HZ, !RES, , , , , , );


--state.reset2 is state.reset2
--operation mode is normal

state.reset2_lut_out = state.hold & (!next_command.reset2);
state.reset2 = DFFEAS(state.reset2_lut_out, CLK_400HZ, !RES, , , , , , );


--state.reset3 is state.reset3
--operation mode is normal

state.reset3_lut_out = state.hold & next_command.reset3;
state.reset3 = DFFEAS(state.reset3_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L120 is state.display_clear~88
--operation mode is normal

A1L120 = state.reset1 & !state.func_set & !state.reset2 & !state.reset3;


--CLK_400HZ is CLK_400HZ
--operation mode is normal

CLK_400HZ_lut_out = !RES & (CLK_400HZ $ !A1L73);
CLK_400HZ = DFFEAS(CLK_400HZ_lut_out, CLK, VCC, , , , , , );


--next_command.display_set is next_command.display_set
--operation mode is normal

next_command.display_set_lut_out = state.mode_set # state.return_home # next_command.display_set & !A1L102;
next_command.display_set = DFFEAS(next_command.display_set_lut_out, CLK_400HZ, !RES, , , , , , );


--A1L102 is Select~2540
--operation mode is normal

A1L102 = !state.toggle_e & !state.hold;


--next_command.display_on is next_command.display_on
--operation mode is normal

next_command.display_on_lut_out = state.display_clear # next_command.display_on & (state.toggle_e # state.hold);
next_command.display_on = DFFEAS(next_command.display_on_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.display_off is next_command.display_off
--operation mode is normal

next_command.display_off_lut_out = state.func_set # next_command.display_off & (state.toggle_e # state.hold);
next_command.display_off = DFFEAS(next_command.display_off_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.mode_set is next_command.mode_set
--operation mode is normal

next_command.mode_set_lut_out = state.display_on # next_command.mode_set & (state.toggle_e # state.hold);
next_command.mode_set = DFFEAS(next_command.mode_set_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.return_home is next_command.return_home
--operation mode is normal

next_command.return_home_lut_out = state.write_char7 # next_command.return_home & (state.toggle_e # state.hold);
next_command.return_home = DFFEAS(next_command.return_home_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.display_clear is next_command.display_clear
--operation mode is normal

next_command.display_clear_lut_out = state.display_off # next_command.display_clear & (state.toggle_e # state.hold);
next_command.display_clear = DFFEAS(next_command.display_clear_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.goto_nextline is next_command.goto_nextline
--operation mode is normal

next_command.goto_nextline_lut_out = state.write1_char3 # A1L103 # state.write2_char3 # !A1L104;
next_command.goto_nextline = DFFEAS(next_command.goto_nextline_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.func_set is next_command.func_set
--operation mode is normal

next_command.func_set_lut_out = state.reset3 # next_command.func_set & (state.toggle_e # state.hold);
next_command.func_set = DFFEAS(next_command.func_set_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.reset2 is next_command.reset2
--operation mode is normal

next_command.reset2_lut_out = state.reset1 & (next_command.reset2 # !state.toggle_e & !state.hold);
next_command.reset2 = DFFEAS(next_command.reset2_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.reset3 is next_command.reset3
--operation mode is normal

next_command.reset3_lut_out = state.reset2 # next_command.reset3 & (state.toggle_e # state.hold);
next_command.reset3 = DFFEAS(next_command.reset3_lut_out, CLK_400HZ, !RES, , , , , , );


--CLK_COUNT_400HZ[16] is CLK_COUNT_400HZ[16]
--operation mode is arithmetic

CLK_COUNT_400HZ[16]_carry_eqn = A1L35;
CLK_COUNT_400HZ[16]_lut_out = CLK_COUNT_400HZ[16] $ (!CLK_COUNT_400HZ[16]_carry_eqn);
CLK_COUNT_400HZ[16] = DFFEAS(CLK_COUNT_400HZ[16]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L37 is CLK_COUNT_400HZ[16]~337
--operation mode is arithmetic

A1L37 = CARRY(CLK_COUNT_400HZ[16] & (!A1L35));


--CLK_COUNT_400HZ[17] is CLK_COUNT_400HZ[17]
--operation mode is arithmetic

CLK_COUNT_400HZ[17]_carry_eqn = A1L37;
CLK_COUNT_400HZ[17]_lut_out = CLK_COUNT_400HZ[17] $ (CLK_COUNT_400HZ[17]_carry_eqn);
CLK_COUNT_400HZ[17] = DFFEAS(CLK_COUNT_400HZ[17]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L39 is CLK_COUNT_400HZ[17]~341
--operation mode is arithmetic

A1L39 = CARRY(!A1L37 # !CLK_COUNT_400HZ[17]);


--CLK_COUNT_400HZ[18] is CLK_COUNT_400HZ[18]
--operation mode is arithmetic

CLK_COUNT_400HZ[18]_carry_eqn = A1L39;
CLK_COUNT_400HZ[18]_lut_out = CLK_COUNT_400HZ[18] $ (!CLK_COUNT_400HZ[18]_carry_eqn);
CLK_COUNT_400HZ[18] = DFFEAS(CLK_COUNT_400HZ[18]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L41 is CLK_COUNT_400HZ[18]~345
--operation mode is arithmetic

A1L41 = CARRY(CLK_COUNT_400HZ[18] & (!A1L39));


--CLK_COUNT_400HZ[19] is CLK_COUNT_400HZ[19]
--operation mode is normal

CLK_COUNT_400HZ[19]_carry_eqn = A1L41;
CLK_COUNT_400HZ[19]_lut_out = CLK_COUNT_400HZ[19] $ (CLK_COUNT_400HZ[19]_carry_eqn);
CLK_COUNT_400HZ[19] = DFFEAS(CLK_COUNT_400HZ[19]_lut_out, CLK, VCC, , , , , A1L43, );


--A1L69 is LessThan~411
--operation mode is normal

A1L69 = !CLK_COUNT_400HZ[16] & !CLK_COUNT_400HZ[17] & !CLK_COUNT_400HZ[18] & !CLK_COUNT_400HZ[19];


--CLK_COUNT_400HZ[5] is CLK_COUNT_400HZ[5]
--operation mode is arithmetic

CLK_COUNT_400HZ[5]_carry_eqn = A1L13;
CLK_COUNT_400HZ[5]_lut_out = CLK_COUNT_400HZ[5] $ (CLK_COUNT_400HZ[5]_carry_eqn);
CLK_COUNT_400HZ[5] = DFFEAS(CLK_COUNT_400HZ[5]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L15 is CLK_COUNT_400HZ[5]~353
--operation mode is arithmetic

A1L15 = CARRY(!A1L13 # !CLK_COUNT_400HZ[5]);


--CLK_COUNT_400HZ[6] is CLK_COUNT_400HZ[6]
--operation mode is arithmetic

CLK_COUNT_400HZ[6]_carry_eqn = A1L15;
CLK_COUNT_400HZ[6]_lut_out = CLK_COUNT_400HZ[6] $ (!CLK_COUNT_400HZ[6]_carry_eqn);
CLK_COUNT_400HZ[6] = DFFEAS(CLK_COUNT_400HZ[6]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L17 is CLK_COUNT_400HZ[6]~357
--operation mode is arithmetic

A1L17 = CARRY(CLK_COUNT_400HZ[6] & (!A1L15));


--CLK_COUNT_400HZ[7] is CLK_COUNT_400HZ[7]
--operation mode is arithmetic

CLK_COUNT_400HZ[7]_carry_eqn = A1L17;
CLK_COUNT_400HZ[7]_lut_out = CLK_COUNT_400HZ[7] $ (CLK_COUNT_400HZ[7]_carry_eqn);
CLK_COUNT_400HZ[7] = DFFEAS(CLK_COUNT_400HZ[7]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L19 is CLK_COUNT_400HZ[7]~361
--operation mode is arithmetic

A1L19 = CARRY(!A1L17 # !CLK_COUNT_400HZ[7]);


--CLK_COUNT_400HZ[8] is CLK_COUNT_400HZ[8]
--operation mode is arithmetic

CLK_COUNT_400HZ[8]_carry_eqn = A1L19;
CLK_COUNT_400HZ[8]_lut_out = CLK_COUNT_400HZ[8] $ (!CLK_COUNT_400HZ[8]_carry_eqn);
CLK_COUNT_400HZ[8] = DFFEAS(CLK_COUNT_400HZ[8]_lut_out, CLK, VCC, , , , , A1L43, );

--A1L21 is CLK_COUNT_400HZ[8]~365
--operation mode is arithmetic