📄 lat_receive.vhd
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LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE ieee.std_logic_unsigned.all;
ENTITY lat_receive IS
PORT ( in_lat :IN std_logic;
in_rclk :IN STD_LOGIC;
out_rclk :OUT std_logic;
out_lat :OUT std_logic
);
END lat_receive;
ARCHITECTURE A OF lat_receive IS
SIGNAL rclk : STD_LOGIC;
SIGNAL t0_in_lat : STD_LOGIC;
SIGNAL t1_in_lat : STD_LOGIC;
SIGNAL lat_temp : STD_LOGIC;
signal count : integer range 0 to 1024;
BEGIN
out_rclk<=rclk;
out_lat<=lat_temp;
process (in_rclk)
begin
if in_rclk'event and in_rclk='0' then
if count<11 then
rclk<=not rclk;
elsif count=11 then
elsif count=12 then
rclk<=not rclk;
end if;
end if;
end process;
process (rclk)
begin
if rclk'event and rclk='1' then
t0_in_lat<=in_lat;
end if;
end process;
process (rclk)
begin
if rclk'event and rclk='0' then
t1_in_lat<=in_lat;
end if;
end process;
process (rclk)
begin
if rclk'event and rclk='0' then
if t0_in_lat='0' and t1_in_lat='1' then
lat_temp<='0' ;
elsif t0_in_lat='1' and t1_in_lat='0' then
lat_temp<='1' ;
-- else
-- t0_in_lat<=in_lat;
end if;
end if;
end process;
process(in_rclk)
begin
if lat_temp='0' then
count<=0;
elsif in_rclk='1' and in_rclk'event then
if count<12 then
count<=count+1;
else
count<=0;
end if;
end if;
end process;
END ;
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