keyboardtest.map.rpt

键盘去抖动CPLD设计经过验证,可以直接用数码管显示,同时也希望大家给于新想法

;       |lpm_counter:REG_rtl_0|  ; 9          ; 0    ; |keyboardtest|CODE:codegen|lpm_counter:REG_rtl_0 ;
;    |cnt5:clkdiv|               ; 3          ; 0    ; |keyboardtest|cnt5:clkdiv                        ;
;       |lpm_counter:out1_rtl_1| ; 3          ; 0    ; |keyboardtest|cnt5:clkdiv|lpm_counter:out1_rtl_1 ;
;    |debounce:keydeb|           ; 4          ; 0    ; |keyboardtest|debounce:keydeb                    ;
;       |jkt:jkf|                ; 1          ; 0    ; |keyboardtest|debounce:keydeb|jkt:jkf            ;
;    |keypress_det:key_select|   ; 9          ; 0    ; |keyboardtest|keypress_det:key_select            ;
;    |sevenseg:SEVEN_DSP|        ; 7          ; 0    ; |keyboardtest|sevenseg:SEVEN_DSP                 ;
+--------------------------------+------------+------+--------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------+
; User-Specified and Inferred Latches                                                                             ;
+----------------------------------------------------+-----------------------------------+------------------------+
; Latch Name                                         ; Latch Enable Signal               ; Free of Timing Hazards ;
+----------------------------------------------------+-----------------------------------+------------------------+
; keypress_det:key_select|REAL_code[0]               ; keypress_det:key_select|always0~7 ; yes                    ;
; keypress_det:key_select|REAL_code[1]               ; keypress_det:key_select|always0~7 ; yes                    ;
; keypress_det:key_select|REAL_code[2]               ; keypress_det:key_select|always0~7 ; yes                    ;
; keypress_det:key_select|REAL_code[3]               ; keypress_det:key_select|always0~7 ; yes                    ;
; Number of user-specified and inferred latches = 4  ;                                   ;                        ;
+----------------------------------------------------+-----------------------------------+------------------------+
Note: All latches listed above may not be present at the end of synthesis due to various synthesis optimizations.


+-----------------------------------------------------------+
; Parameter Settings for User Entity Instance: CODE:codegen ;
+----------------+-------+----------------------------------+
; Parameter Name ; Value ; Type                             ;
+----------------+-------+----------------------------------+
; leng           ; 9     ; Integer                          ;
+----------------+-------+----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: CODE:codegen|lpm_counter:REG_rtl_0 ;
+------------------------+-------------------+----------------------------------------+
; Parameter Name         ; Value             ; Type                                   ;
+------------------------+-------------------+----------------------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                             ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY                           ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE                           ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE                         ;
; LPM_WIDTH              ; 9                 ; Untyped                                ;
; LPM_DIRECTION          ; UP                ; Untyped                                ;
; LPM_MODULUS            ; 0                 ; Untyped                                ;
; LPM_AVALUE             ; UNUSED            ; Untyped                                ;
; LPM_SVALUE             ; UNUSED            ; Untyped                                ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                                ;
; DEVICE_FAMILY          ; MAX7000S          ; Untyped                                ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                                ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH                     ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK                     ;
; CARRY_CNT_EN           ; SMART             ; Untyped                                ;
; LABWIDE_SCLR           ; ON                ; Untyped                                ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                                ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                                ;
+------------------------+-------------------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: cnt5:clkdiv|lpm_counter:out1_rtl_1 ;
+------------------------+-------------------+----------------------------------------+
; Parameter Name         ; Value             ; Type                                   ;
+------------------------+-------------------+----------------------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                             ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY                           ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE                           ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE                         ;
; LPM_WIDTH              ; 5                 ; Untyped                                ;
; LPM_DIRECTION          ; UP                ; Untyped                                ;
; LPM_MODULUS            ; 0                 ; Untyped                                ;
; LPM_AVALUE             ; UNUSED            ; Untyped                                ;
; LPM_SVALUE             ; UNUSED            ; Untyped                                ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                                ;
; DEVICE_FAMILY          ; MAX7000S          ; Untyped                                ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                                ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH                     ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK                     ;
; CARRY_CNT_EN           ; SMART             ; Untyped                                ;
; LABWIDE_SCLR           ; ON                ; Untyped                                ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                                ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                                ;
+------------------------+-------------------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Thu Aug 30 02:17:08 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off keyboardtest -c keyboardtest
Info: Found 1 design units, including 1 entities, in source file src/sevenseg.v
    Info: Found entity 1: sevenseg
Info: Found 1 design units, including 1 entities, in source file src/keypress_det.v
    Info: Found entity 1: keypress_det
Info: Found 1 design units, including 1 entities, in source file src/keyboardtest.v
    Info: Found entity 1: keyboardtest
Info: Found 1 design units, including 1 entities, in source file src/CODE.v
    Info: Found entity 1: CODE
Info: Found 1 design units, including 1 entities, in source file src/jkt.v
    Info: Found entity 1: jkt
Info: Found 1 design units, including 1 entities, in source file src/debounce.v
    Info: Found entity 1: debounce
Info: Found 1 design units, including 1 entities, in source file src/cnt5.v
    Info: Found entity 1: cnt5
Info: Elaborating entity "keyboardtest" for the top level hierarchy
Info: Elaborating entity "cnt5" for hierarchy "cnt5:clkdiv"
Info: Elaborating entity "debounce" for hierarchy "debounce:keydeb"
Info: Elaborating entity "jkt" for hierarchy "debounce:keydeb|jkt:jkf"
Info: Elaborating entity "CODE" for hierarchy "CODE:codegen"
Info: Elaborating entity "keypress_det" for hierarchy "keypress_det:key_select"
Warning (10235): Verilog HDL Always Construct warning at keypress_det.v(41): variable "PRESSIN" is read inside the Always Construct but isn't in the Always Construct's Event Control
Warning (10240): Verilog HDL Always Construct warning at keypress_det.v(29): inferring latch(es) for variable "REAL_code", which holds its previous value in one or more paths through the always construct
Info (10041): Verilog HDL or VHDL info at keypress_det.v(41): inferred latch for "REAL_code[3]"
Info (10041): Verilog HDL or VHDL info at keypress_det.v(41): inferred latch for "REAL_code[2]"
Info (10041): Verilog HDL or VHDL info at keypress_det.v(41): inferred latch for "REAL_code[1]"
Info (10041): Verilog HDL or VHDL info at keypress_det.v(41): inferred latch for "REAL_code[0]"
Info: Elaborating entity "sevenseg" for hierarchy "sevenseg:SEVEN_DSP"
Info: Inferred 2 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=9) from the following logic: "CODE:codegen|REG[0]~0"
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=5) from the following logic: "cnt5:clkdiv|out1[0]~0"
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Elaborated megafunction instantiation "CODE:codegen|lpm_counter:REG_rtl_0"
Info: Elaborated megafunction instantiation "cnt5:clkdiv|lpm_counter:out1_rtl_1"
Info: Duplicate registers merged to single register
    Info: Duplicate register "cnt5:clkdiv|lpm_counter:out1_rtl_1|dffs[0]" merged to single register "CODE:codegen|lpm_counter:REG_rtl_0|dffs[0]"
    Info: Duplicate register "cnt5:clkdiv|lpm_counter:out1_rtl_1|dffs[1]" merged to single register "CODE:codegen|lpm_counter:REG_rtl_0|dffs[1]"
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "seven[7]" stuck at VCC
Info: Promoted pin-driven signal(s) to global signal
    Info: Promoted clock signal driven by pin "CLK" to global clock signal
    Info: Promoted clear signal driven by pin "RESET" to global clear signal
Info: Implemented 54 device resources after synthesis - the final resource count might be different
    Info: Implemented 6 input pins
    Info: Implemented 12 output pins
    Info: Implemented 33 macrocells
    Info: Implemented 3 shareable expanders
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 4 warnings
    Info: Processing ended: Thu Aug 30 02:17:09 2007
    Info: Elapsed time: 00:00:02