📄 dds.map.rpt
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+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read ;
+----------------------------------+-----------------+------------------------------+-------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
+----------------------------------+-----------------+------------------------------+-------------------------------------------------------------------+
; Adder10B.v ; yes ; User Verilog HDL File ; E:/EDAFIle/DDS1/Adder10B.v ;
; Adder32B.v ; yes ; User Verilog HDL File ; E:/EDAFIle/DDS1/Adder32B.v ;
; DDS.v ; yes ; User Verilog HDL File ; E:/EDAFIle/DDS1/DDS.v ;
; REG10B.v ; yes ; User Verilog HDL File ; E:/EDAFIle/DDS1/REG10B.v ;
; REG32B.v ; yes ; User Verilog HDL File ; E:/EDAFIle/DDS1/REG32B.v ;
; Sin_rom.v ; yes ; User Verilog HDL File ; E:/EDAFIle/DDS1/Sin_rom.v ;
; altsyncram.tdf ; yes ; Megafunction ; c:/altera/quartus60/libraries/megafunctions/altsyncram.tdf ;
; stratix_ram_block.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/stratix_ram_block.inc ;
; lpm_mux.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/lpm_mux.inc ;
; lpm_decode.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/lpm_decode.inc ;
; aglobal60.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/aglobal60.inc ;
; altsyncram.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/altsyncram.inc ;
; a_rdenreg.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/a_rdenreg.inc ;
; altrom.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/altrom.inc ;
; altram.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/altram.inc ;
; altdpram.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/altdpram.inc ;
; altqpram.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/altqpram.inc ;
; db/altsyncram_ha91.tdf ; yes ; Auto-Generated Megafunction ; E:/EDAFIle/DDS1/db/altsyncram_ha91.tdf ;
; db/altsyncram_66f2.tdf ; yes ; Auto-Generated Megafunction ; E:/EDAFIle/DDS1/db/altsyncram_66f2.tdf ;
; sld_mod_ram_rom.vhd ; yes ; Encrypted Megafunction ; c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd ;
; sld_rom_sr.vhd ; yes ; Encrypted Megafunction ; c:/altera/quartus60/libraries/megafunctions/sld_rom_sr.vhd ;
; sld_hub.vhd ; yes ; Encrypted Megafunction ; c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd ;
; lpm_shiftreg.tdf ; yes ; Megafunction ; c:/altera/quartus60/libraries/megafunctions/lpm_shiftreg.tdf ;
; lpm_constant.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/lpm_constant.inc ;
; dffeea.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/dffeea.inc ;
; lpm_decode.tdf ; yes ; Megafunction ; c:/altera/quartus60/libraries/megafunctions/lpm_decode.tdf ;
; declut.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/declut.inc ;
; altshift.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/altshift.inc ;
; lpm_compare.inc ; yes ; Other ; c:/altera/quartus60/libraries/megafunctions/lpm_compare.inc ;
; db/decode_aoi.tdf ; yes ; Auto-Generated Megafunction ; E:/EDAFIle/DDS1/db/decode_aoi.tdf ;
; sld_dffex.vhd ; yes ; Encrypted Megafunction ; c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd ;
+----------------------------------+-----------------+------------------------------+-------------------------------------------------------------------+
+------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+---------------------------------------------+--------------------------+
; Resource ; Usage ;
+---------------------------------------------+--------------------------+
; Estimated Total logic elements ; 177 ;
; Total combinational functions ; 177 ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 61 ;
; -- 3 input functions ; 59 ;
; -- <=2 input functions ; 57 ;
; -- Combinational cells for routing ; 0 ;
; Logic elements by mode ; ;
; -- normal mode ; 139 ;
; -- arithmetic mode ; 38 ;
; Total registers ; 139 ;
; I/O pins ; 31 ;
; Total memory bits ; 10240 ;
; Maximum fan-out node ; altera_internal_jtag~TDO ;
; Maximum fan-out ; 141 ;
; Total fan-out ; 1215 ;
; Average fan-out ; 3.39 ;
+---------------------------------------------+--------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+---------------------------------------------------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; M4Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ;
+---------------------------------------------------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
; |DDS ; 177 (0) ; 139 (0) ; 10240 ; 0 ; 0 ; 0 ; 0 ; 31 ; 0 ; |DDS ;
; |REG10B:U5| ; 8 (8) ; 10 (10) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|REG10B:U5 ;
; |REG32B:U1| ; 0 (0) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|REG32B:U1 ;
; |REG32B:U3| ; 12 (12) ; 12 (12) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|REG32B:U3 ;
; |Sin_rom:U6| ; 63 (0) ; 39 (0) ; 10240 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|Sin_rom:U6 ;
; |altsyncram:altsyncram_component| ; 63 (0) ; 39 (0) ; 10240 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|Sin_rom:U6|altsyncram:altsyncram_component ;
; |altsyncram_ha91:auto_generated| ; 63 (0) ; 39 (0) ; 10240 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated ;
; |altsyncram_66f2:altsyncram1| ; 0 (0) ; 0 (0) ; 10240 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1 ;
; |sld_mod_ram_rom:mgl_prim2| ; 63 (38) ; 39 (30) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|sld_mod_ram_rom:mgl_prim2 ;
; |sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr| ; 25 (25) ; 9 (9) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr ;
; |sld_hub:sld_hub_inst| ; 94 (39) ; 70 (7) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst ;
; |lpm_decode:instruction_decoder| ; 5 (0) ; 5 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder ;
; |decode_aoi:auto_generated| ; 5 (5) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated ;
; |lpm_shiftreg:jtag_ir_register| ; 0 (0) ; 10 (10) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register ;
; |sld_dffex:BROADCAST| ; 2 (2) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|sld_dffex:BROADCAST ;
; |sld_dffex:IRF_ENA_0| ; 1 (1) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0 ;
; |sld_dffex:IRF_ENA| ; 0 (0) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA ;
; |sld_dffex:IRSR| ; 3 (3) ; 6 (6) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|sld_dffex:IRSR ;
; |sld_dffex:RESET| ; 2 (2) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|sld_dffex:RESET ;
; |sld_dffex:\GEN_IRF:1:IRF| ; 1 (1) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF ;
; |sld_dffex:\GEN_SHADOW_IRF:1:S_IRF| ; 0 (0) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF ;
; |sld_jtag_state_machine:jtag_state_machine| ; 20 (20) ; 19 (19) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine ;
; |sld_rom_sr:HUB_INFO_REG| ; 21 (21) ; 9 (9) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DDS|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG ;
+---------------------------------------------------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+-------+-------------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+-------+-------------+
; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ALTSYNCRAM ; AUTO ; True Dual Port ; 1024 ; 10 ; 1024 ; 10 ; 10240 ; Sin_rom.mif ;
+------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+-------+-------------+
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 139 ;
; Number of registers using Synchronous Clear ; 23 ;
; Number of registers using Synchronous Load ; 10 ;
; Number of registers using Asynchronous Clear ; 58 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 66 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+--------------------------------------------------+
; Inverted Register Statistics ;
+----------------------------------------+---------+
; Inverted Register ; Fan out ;
+----------------------------------------+---------+
; sld_hub:sld_hub_inst|hub_tdo ; 2 ;
; Total number of inverted registers = 1 ; ;
+----------------------------------------+---------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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