uart.map.eqn

串口程序

--A1L244 is txd_buf~1834
--operation mode is normal

A1L244 = A1L243 & (send_state[2] & (!send_state[1]) # !send_state[2] & (send_state[1] # !send_state[0]));


--txd_buf[1] is txd_buf[1]
--operation mode is normal

txd_buf[1]_lut_out = A1L237 & (txd_buf[2]) # !A1L237 & A1L246;
txd_buf[1] = DFFEAS(txd_buf[1]_lut_out, clkbaud8x, rst, , A1L234, VCC, , , !key_entry2);


--A1L245 is txd_buf~1835
--operation mode is normal

A1L245 = txd_buf[1] & (!state_tras[1] # !state_tras[3]) # !key_entry2;


--A1L233 is txd_buf[0]~1836
--operation mode is normal

A1L233 = state_tras[2] # !state_tras[0] # !state_tras[3];


--A1L234 is txd_buf[0]~1838
--operation mode is normal

A1L234 = key_entry2 & !A1L232 & !A1L235 # !key_entry2 & (key_entry1);


--div_reg[15] is div_reg[15]
--operation mode is normal

div_reg[15]_lut_out = A1L3;
div_reg[15] = DFFEAS(div_reg[15]_lut_out, clk, rst, , , , , , );


--div_reg[14] is div_reg[14]
--operation mode is normal

div_reg[14]_lut_out = A1L4;
div_reg[14] = DFFEAS(div_reg[14]_lut_out, clk, rst, , , , , , );


--div_reg[13] is div_reg[13]
--operation mode is normal

div_reg[13]_lut_out = A1L6;
div_reg[13] = DFFEAS(div_reg[13]_lut_out, clk, rst, , , , , , );


--div_reg[12] is div_reg[12]
--operation mode is normal

div_reg[12]_lut_out = A1L8;
div_reg[12] = DFFEAS(div_reg[12]_lut_out, clk, rst, , , , , , );


--A1L166 is rtl~240
--operation mode is normal

A1L166 = !div_reg[15] & !div_reg[14] & !div_reg[13] & !div_reg[12];


--div_reg[8] is div_reg[8]
--operation mode is normal

div_reg[8]_lut_out = A1L10 & (!A1L170);
div_reg[8] = DFFEAS(div_reg[8]_lut_out, clk, rst, , , , , , );


--div_reg[11] is div_reg[11]
--operation mode is normal

div_reg[11]_lut_out = A1L12;
div_reg[11] = DFFEAS(div_reg[11]_lut_out, clk, rst, , , , , , );


--div_reg[10] is div_reg[10]
--operation mode is normal

div_reg[10]_lut_out = A1L14;
div_reg[10] = DFFEAS(div_reg[10]_lut_out, clk, rst, , , , , , );


--div_reg[9] is div_reg[9]
--operation mode is normal

div_reg[9]_lut_out = A1L16;
div_reg[9] = DFFEAS(div_reg[9]_lut_out, clk, rst, , , , , , );


--A1L167 is rtl~241
--operation mode is normal

A1L167 = div_reg[8] & !div_reg[11] & !div_reg[10] & !div_reg[9];


--div_reg[7] is div_reg[7]
--operation mode is normal

div_reg[7]_lut_out = A1L18;
div_reg[7] = DFFEAS(div_reg[7]_lut_out, clk, rst, , , , , , );


--div_reg[6] is div_reg[6]
--operation mode is normal

div_reg[6]_lut_out = A1L20;
div_reg[6] = DFFEAS(div_reg[6]_lut_out, clk, rst, , , , , , );


--div_reg[5] is div_reg[5]
--operation mode is normal

div_reg[5]_lut_out = A1L22;
div_reg[5] = DFFEAS(div_reg[5]_lut_out, clk, rst, , , , , , );


--div_reg[4] is div_reg[4]
--operation mode is normal

div_reg[4]_lut_out = A1L24;
div_reg[4] = DFFEAS(div_reg[4]_lut_out, clk, rst, , , , , , );


--A1L168 is rtl~242
--operation mode is normal

A1L168 = !div_reg[7] & !div_reg[6] & !div_reg[5] & !div_reg[4];


--div_reg[1] is div_reg[1]
--operation mode is normal

div_reg[1]_lut_out = A1L26;
div_reg[1] = DFFEAS(div_reg[1]_lut_out, clk, rst, , , , , , );


--div_reg[0] is div_reg[0]
--operation mode is normal

div_reg[0]_lut_out = A1L28;
div_reg[0] = DFFEAS(div_reg[0]_lut_out, clk, rst, , , , , , );


--div_reg[3] is div_reg[3]
--operation mode is normal

div_reg[3]_lut_out = A1L30;
div_reg[3] = DFFEAS(div_reg[3]_lut_out, clk, rst, , , , , , );


--div_reg[2] is div_reg[2]
--operation mode is normal

div_reg[2]_lut_out = A1L32 & (!A1L170);
div_reg[2] = DFFEAS(div_reg[2]_lut_out, clk, rst, , , , , , );


--A1L169 is rtl~243
--operation mode is normal

A1L169 = div_reg[1] & div_reg[0] & !div_reg[3] & !div_reg[2];


--A1L170 is rtl~244
--operation mode is normal

A1L170 = A1L166 & A1L167 & A1L168 & A1L169;


--rxd_reg1 is rxd_reg1
--operation mode is normal

rxd_reg1_lut_out = rxd;
rxd_reg1 = DFFEAS(rxd_reg1_lut_out, clkbaud8x, rst, , , , , , );


--recstart is recstart
--operation mode is normal

recstart_lut_out = A1L163 & (recstart_tmp # recstart & A1L161) # !A1L163 & recstart & A1L161;
recstart = DFFEAS(recstart_lut_out, clkbaud8x, rst, , , , , , );


--A1L212 is state_rec[0]~737
--operation mode is normal

A1L212 = state_rec[3] & (!div8_rec_reg[1] # !A1L165) # !state_rec[3] & !div8_rec_reg[1] & (state_rec[0] # !A1L165);


--A1L163 is rtl~2
--operation mode is normal

A1L163 = !state_rec[3] & !state_rec[0] & !state_rec[2] & !state_rec[1];


--recstart_tmp is recstart_tmp
--operation mode is normal

recstart_tmp_lut_out = recstart_tmp & (!A1L163) # !recstart_tmp & rxd_reg2 & !rxd_reg1 & A1L163;
recstart_tmp = DFFEAS(recstart_tmp_lut_out, clkbaud8x, rst, , , , , , );


--A1L213 is state_rec[0]~738
--operation mode is normal

A1L213 = A1L163 & (!recstart_tmp) # !A1L163 & (!div8_rec_reg[0] # !div8_rec_reg[2]);


--A1L214 is state_rec[0]~739
--operation mode is normal

A1L214 = A1L212 # A1L213;


--A1L1 is add~896
--operation mode is normal

A1L1 = state_rec[0] & state_rec[1];


--A1L218 is state_rec~740
--operation mode is normal

A1L218 = state_rec[3] & (state_rec[0] # state_rec[2] # state_rec[1]);


--A1L2 is add~897
--operation mode is normal

A1L2 = state_rec[0] & state_rec[2] & state_rec[1];


--cnt_delay[19] is cnt_delay[19]
--operation mode is normal

cnt_delay[19]_lut_out = A1L34 & A1L164;
cnt_delay[19] = DFFEAS(cnt_delay[19]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[18] is cnt_delay[18]
--operation mode is normal

cnt_delay[18]_lut_out = A1L35 & A1L164;
cnt_delay[18] = DFFEAS(cnt_delay[18]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[13] is cnt_delay[13]
--operation mode is normal

cnt_delay[13]_lut_out = A1L37 & A1L164;
cnt_delay[13] = DFFEAS(cnt_delay[13]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[12] is cnt_delay[12]
--operation mode is normal

cnt_delay[12]_lut_out = A1L39 & A1L164;
cnt_delay[12] = DFFEAS(cnt_delay[12]_lut_out, clk, rst, , start_delaycnt, , , , );


--A1L171 is rtl~245
--operation mode is normal

A1L171 = !cnt_delay[12] # !cnt_delay[13] # !cnt_delay[18] # !cnt_delay[19];


--cnt_delay[17] is cnt_delay[17]
--operation mode is normal

cnt_delay[17]_lut_out = A1L41;
cnt_delay[17] = DFFEAS(cnt_delay[17]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[16] is cnt_delay[16]
--operation mode is normal

cnt_delay[16]_lut_out = A1L43;
cnt_delay[16] = DFFEAS(cnt_delay[16]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[15] is cnt_delay[15]
--operation mode is normal

cnt_delay[15]_lut_out = A1L45;
cnt_delay[15] = DFFEAS(cnt_delay[15]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[14] is cnt_delay[14]
--operation mode is normal

cnt_delay[14]_lut_out = A1L47;
cnt_delay[14] = DFFEAS(cnt_delay[14]_lut_out, clk, rst, , start_delaycnt, , , , );


--A1L203 is start_delaycnt~221
--operation mode is normal

A1L203 = !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14];


--cnt_delay[11] is cnt_delay[11]
--operation mode is normal

cnt_delay[11]_lut_out = A1L49;
cnt_delay[11] = DFFEAS(cnt_delay[11]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[9] is cnt_delay[9]
--operation mode is normal

cnt_delay[9]_lut_out = A1L51;
cnt_delay[9] = DFFEAS(cnt_delay[9]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[7] is cnt_delay[7]
--operation mode is normal

cnt_delay[7]_lut_out = A1L53;
cnt_delay[7] = DFFEAS(cnt_delay[7]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[6] is cnt_delay[6]
--operation mode is normal

cnt_delay[6]_lut_out = A1L55;
cnt_delay[6] = DFFEAS(cnt_delay[6]_lut_out, clk, rst, , start_delaycnt, , , , );


--A1L204 is start_delaycnt~222
--operation mode is normal

A1L204 = !cnt_delay[11] & !cnt_delay[9] & !cnt_delay[7] & !cnt_delay[6];


--cnt_delay[5] is cnt_delay[5]
--operation mode is normal

cnt_delay[5]_lut_out = A1L57;
cnt_delay[5] = DFFEAS(cnt_delay[5]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[4] is cnt_delay[4]
--operation mode is normal

cnt_delay[4]_lut_out = A1L59;
cnt_delay[4] = DFFEAS(cnt_delay[4]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[3] is cnt_delay[3]
--operation mode is normal

cnt_delay[3]_lut_out = A1L61;
cnt_delay[3] = DFFEAS(cnt_delay[3]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[2] is cnt_delay[2]
--operation mode is normal

cnt_delay[2]_lut_out = A1L63;
cnt_delay[2] = DFFEAS(cnt_delay[2]_lut_out, clk, rst, , start_delaycnt, , , , );


--A1L205 is start_delaycnt~223
--operation mode is normal

A1L205 = !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2];


--cnt_delay[1] is cnt_delay[1]
--operation mode is normal

cnt_delay[1]_lut_out = A1L65;
cnt_delay[1] = DFFEAS(cnt_delay[1]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[0] is cnt_delay[0]
--operation mode is normal

cnt_delay[0]_lut_out = A1L67 & A1L164;
cnt_delay[0] = DFFEAS(cnt_delay[0]_lut_out, clk, rst, , start_delaycnt, , , , );


--A1L206 is start_delaycnt~224
--operation mode is normal

A1L206 = !cnt_delay[1] & !cnt_delay[0];


--A1L207 is start_delaycnt~225
--operation mode is normal

A1L207 = A1L203 & A1L204 & A1L205 & A1L206;


--cnt_delay[10] is cnt_delay[10]
--operation mode is normal

cnt_delay[10]_lut_out = A1L69 & A1L164;
cnt_delay[10] = DFFEAS(cnt_delay[10]_lut_out, clk, rst, , start_delaycnt, , , , );


--cnt_delay[8] is cnt_delay[8]
--operation mode is normal

cnt_delay[8]_lut_out = A1L71 & A1L164;
cnt_delay[8] = DFFEAS(cnt_delay[8]_lut_out, clk, rst, , start_delaycnt, , , , );


--A1L164 is rtl~5
--operation mode is normal

A1L164 = A1L171 # !cnt_delay[8] # !cnt_delay[10] # !A1L207;


--A1L246 is txd_buf~1839
--operation mode is normal

A1L246 = state_tras[1] & send_state[1] & (!send_state[2]);


--txd_buf[2] is txd_buf[2]
--operation mode is normal

txd_buf[2]_lut_out = A1L248 # txd_buf[3] & !state_tras[3] # !key_entry2;
txd_buf[2] = DFFEAS(txd_buf[2]_lut_out, clkbaud8x, rst, , A1L234, , , , );


--A1L237 is txd_buf[1]~1840
--operation mode is normal

A1L237 = !state_tras[1] & (state_tras[2] # !state_tras[0]) # !state_tras[3];


--A1L3 is add~898
--operation mode is normal

A1L3_carry_eqn = A1L5;
A1L3 = div_reg[15] $ (A1L3_carry_eqn);


--A1L4 is add~903
--operation mode is arithmetic

A1L4_carry_eqn = A1L7;
A1L4 = div_reg[14] $ (!A1L4_carry_eqn);

--A1L5 is add~905
--operation mode is arithmetic

A1L5 = CARRY(div_reg[14] & (!A1L7));


--A1L6 is add~908
--operation mode is arithmetic

A1L6_carry_eqn = A1L9;
A1L6 = div_reg[13] $ (A1L6_carry_eqn);

--A1L7 is add~910
--operation mode is arithmetic

A1L7 = CARRY(!A1L9 # !div_reg[13]);


--A1L8 is add~913
--operation mode is arithmetic

A1L8_carry_eqn = A1L13;
A1L8 = div_reg[12] $ (!A1L8_carry_eqn);

--A1L9 is add~915
--operation mode is arithmetic

A1L9 = CARRY(div_reg[12] & (!A1L13));


--A1L10 is add~918
--operation mode is arithmetic

A1L10_carry_eqn = A1L19;
A1L10 = div_reg[8] $ (!A1L10_carry_eqn);

--A1L11 is add~920
--operation mode is arithmetic

A1L11 = CARRY(div_reg[8] & (!A1L19));


--A1L12 is add~923
--operation mode is arithmetic

A1L12_carry_eqn = A1L15;
A1L12 = div_reg[11] $ (A1L12_carry_eqn);

--A1L13 is add~925
--operation mode is arithmetic

A1L13 = CARRY(!A1L15 # !div_reg[11]);


--A1L14 is add~928
--operation mode is arithmetic

A1L14_carry_eqn = A1L17;
A1L14 = div_reg[10] $ (!A1L14_carry_eqn);

--A1L15 is add~930
--operation mode is arithmetic

A1L15 = CARRY(div_reg[10] & (!A1L17));


--A1L16 is add~933
--operation mode is arithmetic

A1L16_carry_eqn = A1L11;
A1L16 = div_reg[9] $ (A1L16_carry_eqn);

--A1L17 is add~935
--operation mode is arithmetic

A1L17 = CARRY(!A1L11 # !div_reg[9]);


--A1L18 is add~938
--operation mode is arithmetic

A1L18_carry_eqn = A1L21;
A1L18 = div_reg[7] $ (A1L18_carry_eqn);

--A1L19 is add~940
--operation mode is arithmetic

A1L19 = CARRY(!A1L21 # !div_reg[7]);


--A1L20 is add~943
--operation mode is arithmetic