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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--txd_reg is txd_reg
--operation mode is normal
txd_reg_lut_out = !A1L263 & (!A1L264 & !A1L265 # !A1L259);
txd_reg = DFFEAS(txd_reg_lut_out, clkbaud8x, rst, , , , , , );
--rxd_buf[7] is rxd_buf[7]
--operation mode is normal
rxd_buf[7]_lut_out = rxd_reg2;
rxd_buf[7] = DFFEAS(rxd_buf[7]_lut_out, clkbaud8x, rst, , A1L183, , , , );
--rxd_buf[0] is rxd_buf[0]
--operation mode is normal
rxd_buf[0]_lut_out = rxd_buf[1];
rxd_buf[0] = DFFEAS(rxd_buf[0]_lut_out, clkbaud8x, rst, , A1L183, , , , );
--rxd_buf[5] is rxd_buf[5]
--operation mode is normal
rxd_buf[5]_lut_out = rxd_buf[6];
rxd_buf[5] = DFFEAS(rxd_buf[5]_lut_out, clkbaud8x, rst, , A1L183, , , , );
--rxd_buf[6] is rxd_buf[6]
--operation mode is normal
rxd_buf[6]_lut_out = rxd_buf[7];
rxd_buf[6] = DFFEAS(rxd_buf[6]_lut_out, clkbaud8x, rst, , A1L183, , , , );
--A1L126 is Mux~6910
--operation mode is normal
A1L126 = rxd_buf[5] & (!rxd_buf[6]);
--rxd_buf[4] is rxd_buf[4]
--operation mode is normal
rxd_buf[4]_lut_out = rxd_buf[5];
rxd_buf[4] = DFFEAS(rxd_buf[4]_lut_out, clkbaud8x, rst, , A1L183, , , , );
--rxd_buf[2] is rxd_buf[2]
--operation mode is normal
rxd_buf[2]_lut_out = rxd_buf[3];
rxd_buf[2] = DFFEAS(rxd_buf[2]_lut_out, clkbaud8x, rst, , A1L183, , , , );
--rxd_buf[1] is rxd_buf[1]
--operation mode is normal
rxd_buf[1]_lut_out = rxd_buf[2];
rxd_buf[1] = DFFEAS(rxd_buf[1]_lut_out, clkbaud8x, rst, , A1L183, , , , );
--A1L127 is Mux~6911
--operation mode is normal
A1L127 = !rxd_buf[2] & !rxd_buf[1];
--A1L128 is Mux~6912
--operation mode is normal
A1L128 = rxd_buf[0] # !A1L127 # !rxd_buf[4] # !A1L126;
--rxd_buf[3] is rxd_buf[3]
--operation mode is normal
rxd_buf[3]_lut_out = rxd_buf[4];
rxd_buf[3] = DFFEAS(rxd_buf[3]_lut_out, clkbaud8x, rst, , A1L183, , , , );
--A1L129 is Mux~6913
--operation mode is normal
A1L129 = rxd_buf[6] & (rxd_buf[0] # rxd_buf[1]) # !rxd_buf[6] & (rxd_buf[2] & (!rxd_buf[1] # !rxd_buf[0]) # !rxd_buf[2] & (rxd_buf[1]));
--A1L130 is Mux~6914
--operation mode is normal
A1L130 = A1L129 & (rxd_buf[5] & rxd_buf[4] & !rxd_buf[6] # !rxd_buf[5] & !rxd_buf[4] & rxd_buf[6]);
--A1L131 is Mux~6915
--operation mode is normal
A1L131 = rxd_buf[7] # rxd_buf[3] & A1L128 # !rxd_buf[3] & (!A1L130);
--A1L132 is Mux~6916
--operation mode is normal
A1L132 = rxd_buf[5] $ rxd_buf[4];
--A1L133 is Mux~6917
--operation mode is normal
A1L133 = !rxd_buf[7] & (!A1L128 # !rxd_buf[3]);
--A1L134 is Mux~6918
--operation mode is normal
A1L134 = rxd_buf[0] & (rxd_buf[1] # !rxd_buf[2]) # !rxd_buf[0] & (rxd_buf[2] & (!rxd_buf[5]) # !rxd_buf[2] & rxd_buf[1]);
--A1L135 is Mux~6919
--operation mode is normal
A1L135 = rxd_buf[6] & !rxd_buf[5] & A1L134 # !rxd_buf[6] & rxd_buf[5] & !A1L134;
--A1L136 is Mux~6920
--operation mode is normal
A1L136 = !rxd_buf[3] & (A1L132 # !A1L135) # !A1L133;
--A1L137 is Mux~6921
--operation mode is normal
A1L137 = rxd_buf[5] & rxd_buf[4] & (rxd_buf[1] # !rxd_buf[2]) # !rxd_buf[5] & !rxd_buf[4] & (rxd_buf[1] # rxd_buf[2]);
--A1L138 is Mux~6922
--operation mode is normal
A1L138 = A1L137 & (rxd_buf[6] & (!rxd_buf[5]) # !rxd_buf[6] & !rxd_buf[0] & rxd_buf[5]);
--A1L139 is Mux~6923
--operation mode is normal
A1L139 = rxd_buf[7] # rxd_buf[3] & A1L128 # !rxd_buf[3] & (!A1L138);
--A1L140 is Mux~6924
--operation mode is normal
A1L140 = rxd_buf[0] & (rxd_buf[1] $ rxd_buf[2] $ rxd_buf[5]) # !rxd_buf[0] & rxd_buf[2] & (!rxd_buf[5] # !rxd_buf[1]);
--A1L141 is Mux~6925
--operation mode is normal
A1L141 = rxd_buf[6] & !rxd_buf[5] & A1L140 # !rxd_buf[6] & rxd_buf[5] & !A1L140;
--A1L142 is Mux~6926
--operation mode is normal
A1L142 = !rxd_buf[3] & (A1L132 # !A1L141) # !A1L133;
--A1L143 is Mux~6927
--operation mode is normal
A1L143 = rxd_buf[1] & (rxd_buf[0] $ !rxd_buf[2]);
--A1L144 is Mux~6928
--operation mode is normal
A1L144 = rxd_buf[6] & !rxd_buf[5] & (rxd_buf[0] $ A1L143) # !rxd_buf[6] & rxd_buf[5] & (rxd_buf[0] # !A1L143);
--A1L145 is Mux~6929
--operation mode is normal
A1L145 = !rxd_buf[3] & (A1L132 # !A1L144) # !A1L133;
--A1L146 is Mux~6930
--operation mode is normal
A1L146 = rxd_buf[0] & !rxd_buf[1] & (rxd_buf[2] # !rxd_buf[5]) # !rxd_buf[0] & rxd_buf[1] & (rxd_buf[2] $ !rxd_buf[5]);
--A1L147 is Mux~6931
--operation mode is normal
A1L147 = rxd_buf[6] & !rxd_buf[5] & A1L146 # !rxd_buf[6] & rxd_buf[5] & !A1L146;
--A1L148 is Mux~6932
--operation mode is normal
A1L148 = !rxd_buf[3] & (A1L132 # !A1L147) # !A1L133;
--A1L149 is Mux~6933
--operation mode is normal
A1L149 = rxd_buf[5] & !rxd_buf[6] & rxd_buf[4] # !rxd_buf[5] & rxd_buf[6] & !rxd_buf[4];
--A1L150 is Mux~6934
--operation mode is normal
A1L150 = rxd_buf[1] & !rxd_buf[4] & (rxd_buf[2] # !rxd_buf[0]) # !rxd_buf[1] & (rxd_buf[0] $ rxd_buf[2] $ rxd_buf[4]);
--A1L151 is Mux~6935
--operation mode is normal
A1L151 = rxd_buf[1] & rxd_buf[4];
--A1L152 is Mux~6936
--operation mode is normal
A1L152 = A1L150 & (A1L149 & !A1L151) # !A1L150 & A1L126 & (A1L151);
--A1L153 is Mux~6937
--operation mode is normal
A1L153 = rxd_buf[7] # rxd_buf[3] & A1L128 # !rxd_buf[3] & (!A1L152);
--key_entry2 is key_entry2
--operation mode is normal
key_entry2_lut_out = A1L124;
key_entry2 = DFFEAS(key_entry2_lut_out, clkbaud8x, rst, , , key_entry1, , , !key_entry2);
--div8_tras_reg[2] is div8_tras_reg[2]
--operation mode is normal
div8_tras_reg[2]_lut_out = div8_tras_reg[2] $ (div8_tras_reg[1] & div8_tras_reg[0] & trasstart);
div8_tras_reg[2] = DFFEAS(div8_tras_reg[2]_lut_out, clkbaud8x, rst, , , , , , );
--div8_tras_reg[1] is div8_tras_reg[1]
--operation mode is normal
div8_tras_reg[1]_lut_out = div8_tras_reg[1] $ (div8_tras_reg[0] & trasstart);
div8_tras_reg[1] = DFFEAS(div8_tras_reg[1]_lut_out, clkbaud8x, rst, , , , , , );
--div8_tras_reg[0] is div8_tras_reg[0]
--operation mode is normal
div8_tras_reg[0]_lut_out = div8_tras_reg[0] $ trasstart;
div8_tras_reg[0] = DFFEAS(div8_tras_reg[0]_lut_out, clkbaud8x, rst, , , , , , );
--A1L259 is txd_reg~739
--operation mode is normal
A1L259 = key_entry2 & div8_tras_reg[2] & div8_tras_reg[1] & div8_tras_reg[0];
--state_tras[3] is state_tras[3]
--operation mode is normal
state_tras[3]_lut_out = state_tras[3] $ (state_tras[2] & A1L266 & A1L156);
state_tras[3] = DFFEAS(state_tras[3]_lut_out, clkbaud8x, rst, , key_entry2, , , , );
--state_tras[2] is state_tras[2]
--operation mode is normal
state_tras[2]_lut_out = state_tras[2] $ (state_tras[0] & state_tras[1] & A1L266);
state_tras[2] = DFFEAS(state_tras[2]_lut_out, clkbaud8x, rst, , key_entry2, , , , );
--state_tras[1] is state_tras[1]
--operation mode is normal
state_tras[1]_lut_out = state_tras[1] $ (A1L266 & state_tras[0]);
state_tras[1] = DFFEAS(state_tras[1]_lut_out, clkbaud8x, rst, , key_entry2, , , , );
--A1L260 is txd_reg~740
--operation mode is normal
A1L260 = state_tras[3] & (state_tras[2] # state_tras[1]);
--state_tras[0] is state_tras[0]
--operation mode is normal
state_tras[0]_lut_out = state_tras[0] & !A1L266 # !state_tras[0] & A1L266 & (state_tras[3] # !A1L158);
state_tras[0] = DFFEAS(state_tras[0]_lut_out, clkbaud8x, rst, , key_entry2, , , , );
--A1L232 is txd_buf[0]~1832
--operation mode is normal
A1L232 = !state_tras[3] & !state_tras[0] & !state_tras[2] & !state_tras[1];
--send_state[0] is send_state[0]
--operation mode is normal
send_state[0]_lut_out = send_state[0] $ (A1L266 & A1L201);
send_state[0] = DFFEAS(send_state[0]_lut_out, clkbaud8x, rst, , , , , , );
--send_state[2] is send_state[2]
--operation mode is normal
send_state[2]_lut_out = send_state[2] $ (send_state[1] & A1L198);
send_state[2] = DFFEAS(send_state[2]_lut_out, clkbaud8x, rst, , , , , , );
--send_state[1] is send_state[1]
--operation mode is normal
send_state[1]_lut_out = send_state[1] $ (A1L266 & send_state[0] & A1L201);
send_state[1] = DFFEAS(send_state[1]_lut_out, clkbaud8x, rst, , , , , , );
--A1L261 is txd_reg~741
--operation mode is normal
A1L261 = send_state[0] & send_state[2] & send_state[1];
--trasstart is trasstart
--operation mode is normal
trasstart_lut_out = trasstart & (A1L228 # A1L225 & A1L227) # !trasstart & A1L225 & A1L227;
trasstart = DFFEAS(trasstart_lut_out, clkbaud8x, rst, , , , , , );
--txd_buf[0] is txd_buf[0]
--operation mode is normal
txd_buf[0]_lut_out = A1L244 # A1L245 # !state_tras[1] & !A1L233;
txd_buf[0] = DFFEAS(txd_buf[0]_lut_out, clkbaud8x, rst, , A1L234, , , , );
--A1L262 is txd_reg~742
--operation mode is normal
A1L262 = A1L232 & (A1L261 # !trasstart) # !A1L232 & (!trasstart & txd_buf[0]);
--A1L263 is txd_reg~743
--operation mode is normal
A1L263 = !txd_reg & (A1L260 # A1L262 # !A1L259);
--A1L154 is Mux~6938
--operation mode is normal
A1L154 = !state_tras[2] & !state_tras[1];
--A1L264 is txd_reg~744
--operation mode is normal
A1L264 = txd_buf[0] & !state_tras[3] & (state_tras[0] # !A1L154);
--A1L155 is Mux~6939
--operation mode is normal
A1L155 = state_tras[3] & (!state_tras[2]);
--A1L265 is txd_reg~745
--operation mode is normal
A1L265 = A1L155 & !state_tras[1] & (txd_buf[0] # state_tras[0]);
--clkbaud8x is clkbaud8x
--operation mode is normal
clkbaud8x_lut_out = clkbaud8x $ A1L170;
clkbaud8x = DFFEAS(clkbaud8x_lut_out, clk, rst, , , , , , );
--rxd_reg2 is rxd_reg2
--operation mode is normal
rxd_reg2_lut_out = rxd_reg1;
rxd_reg2 = DFFEAS(rxd_reg2_lut_out, clkbaud8x, rst, , , , , , );
--div8_rec_reg[2] is div8_rec_reg[2]
--operation mode is normal
div8_rec_reg[2]_lut_out = div8_rec_reg[2] $ (div8_rec_reg[1] & div8_rec_reg[0] & recstart);
div8_rec_reg[2] = DFFEAS(div8_rec_reg[2]_lut_out, clkbaud8x, rst, , , , , , );
--div8_rec_reg[1] is div8_rec_reg[1]
--operation mode is normal
div8_rec_reg[1]_lut_out = div8_rec_reg[1] $ (div8_rec_reg[0] & recstart);
div8_rec_reg[1] = DFFEAS(div8_rec_reg[1]_lut_out, clkbaud8x, rst, , , , , , );
--div8_rec_reg[0] is div8_rec_reg[0]
--operation mode is normal
div8_rec_reg[0]_lut_out = div8_rec_reg[0] $ recstart;
div8_rec_reg[0] = DFFEAS(div8_rec_reg[0]_lut_out, clkbaud8x, rst, , , , , , );
--A1L182 is rxd_buf[7]~167
--operation mode is normal
A1L182 = div8_rec_reg[2] & div8_rec_reg[1] & div8_rec_reg[0];
--state_rec[2] is state_rec[2]
--operation mode is normal
state_rec[2]_lut_out = A1L214 & state_rec[2] # !A1L214 & !A1L218 & (state_rec[2] $ A1L1);
state_rec[2] = DFFEAS(state_rec[2]_lut_out, clkbaud8x, rst, , , , , , );
--state_rec[1] is state_rec[1]
--operation mode is normal
state_rec[1]_lut_out = A1L214 & state_rec[1] # !A1L214 & !A1L218 & (state_rec[1] $ state_rec[0]);
state_rec[1] = DFFEAS(state_rec[1]_lut_out, clkbaud8x, rst, , , , , , );
--A1L165 is rtl~239
--operation mode is normal
A1L165 = !state_rec[2] & !state_rec[1];
--state_rec[0] is state_rec[0]
--operation mode is normal
state_rec[0]_lut_out = state_rec[0] & (A1L212 # A1L213) # !state_rec[0] & !A1L212 & !A1L213 & !A1L218;
state_rec[0] = DFFEAS(state_rec[0]_lut_out, clkbaud8x, rst, , , , , , );
--state_rec[3] is state_rec[3]
--operation mode is normal
state_rec[3]_lut_out = A1L214 & state_rec[3] # !A1L214 & !A1L218 & (state_rec[3] $ A1L2);
state_rec[3] = DFFEAS(state_rec[3]_lut_out, clkbaud8x, rst, , , , , , );
--A1L183 is rxd_buf[7]~168
--operation mode is normal
A1L183 = A1L182 & (state_rec[3] $ (state_rec[0] # !A1L165));
--key_entry1 is key_entry1
--operation mode is normal
key_entry1_lut_out = key_entry1 # !A1L164 & (!key_input);
key_entry1 = DFFEAS(key_entry1_lut_out, clk, rst, , , , , key_entry2, );
--A1L266 is txd_reg~747
--operation mode is normal
A1L266 = div8_tras_reg[2] & div8_tras_reg[1] & div8_tras_reg[0];
--A1L156 is Mux~6940
--operation mode is normal
A1L156 = state_tras[0] & state_tras[1];
--A1L200 is send_state[2]~284
--operation mode is normal
A1L200 = state_tras[3] & state_tras[2];
--A1L201 is send_state[2]~285
--operation mode is normal
A1L201 = key_entry2 & state_tras[0] & state_tras[1] & A1L200;
--A1L198 is send_state[1]~287
--operation mode is normal
A1L198 = A1L266 & send_state[0] & A1L201;
--A1L157 is Mux~6944
--operation mode is normal
A1L157 = state_tras[1] & (!state_tras[3]) # !state_tras[1] & (state_tras[2] & (!state_tras[3]) # !state_tras[2] & (state_tras[0] # state_tras[3]));
--A1L225 is trasstart~710
--operation mode is normal
A1L225 = key_entry2 & (!A1L157);
--A1L226 is trasstart~711
--operation mode is normal
A1L226 = state_tras[3] & (state_tras[2] & (!state_tras[0] # !state_tras[1]) # !state_tras[2] & state_tras[1]);
--A1L227 is trasstart~712
--operation mode is normal
A1L227 = A1L266 & (A1L226 # A1L232 & !A1L261) # !A1L266 & (A1L232 & !A1L261);
--A1L243 is txd_buf~1833
--operation mode is normal
A1L243 = state_tras[3] & state_tras[1];
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