vgainterface.tan.summary

用VHDL语言写的VGA 控制程序

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 15.717 ns
From           : vga_vs_control~reg0
To             : vga_vs_control
From Clock     : clock0
To Clock       : 
Failed Paths   : 0

Type           : Worst-case Minimum tco
Slack          : N/A
Required Time  : None
Actual Time    : 15.461 ns
From           : vga_read_dispaly~reg0
To             : vga_read_dispaly
From Clock     : clock0
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'clock0'
Slack          : N/A
Required Time  : None
Actual Time    : 173.49 MHz ( period = 5.764 ns )
From           : address[3]
To             : tsinghua:u1|altsyncram:altsyncram_component|altsyncram_qcr:auto_generated|ram_block1a1~porta_address_reg3
From Clock     : clock0
To Clock       : clock0
Failed Paths   : 0

Type           : Clock Setup: 'clock2'
Slack          : N/A
Required Time  : None
Actual Time    : 338.41 MHz ( period = 2.955 ns )
From           : count_z[0]
To             : count_z[4]
From Clock     : clock2
To Clock       : clock2
Failed Paths   : 0

Type           : Clock Hold: 'clock0'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : tsinghua:u1|altsyncram:altsyncram_component|altsyncram_qcr:auto_generated|address_reg_a[0]
To             : vga_read
From Clock     : clock0
To Clock       : clock0
Failed Paths   : 6

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 6

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