clockcore.v

自己写的扩展功能时钟

`timescale 1ns / 100ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    21:16:45 07/21/2007 
// Design Name: 
// Module Name:    clockcore 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module clockcore(clk, b1, b2, b3, b4, P, N);
    input clk;
    input b1;
    input b2;
    input b3;
    input b4;
    output [3:0] P;
    output [7:0] N;

    //reg[3:0] P;
	 reg[3:0] ptmp;
	 reg[3:0] pmask;
    reg[7:0] N;
	 reg[10:0] scan;
    reg[3:0] month[1:0],day[1:0],hour[1:0],min[1:0],sec[1:0];
    reg sclk, mclk, hclk, dayc, monc,year1c,year2c,year3c,year4c;
    reg[25:0] divcounter;
    reg[3:0] year[3:0];
    reg[1:0] screen;
	 reg[2:0] state;
	 reg enable;//enable signal for clock;
	 reg sven,mven,hven,dven,monthven,y1ven,y2ven,y3ven,y4ven;//enable varying of counters
	 reg[3:0] daynummsb,daynumlsb;
	 reg[3:0] dispdata;
	 reg dot;
//	 wire sv,mv,hv,dv,monthv,y1v,y2v,y3v,y4v;
	 wire bigmonth,feb;
	 wire leapyear;// remark for leap year;
    wire[3:0] yearten;//ten digit of year;
	 wire[3:0] yearls;
	 wire[3:0] monthmsb,monthlsb;
	 wire sclkbuf,mclkbuf,hclkbuf,daycbuf,moncbuf,y1buf,y2buf,y3buf,y4buf;
	 
//    parameter SEC = 26'h00000ff;
    parameter SEC = 26'h27fffff;
    parameter d0 = 8'b10001000,        
    					d1 = 8'b11011011,
    					d2 = 8'b10100010,
    					d3 = 8'b10010010, 
    					d4 = 8'b11010001,
    					d5 = 8'b10010100, 
    					d6 = 8'b10000100,
    					d7 = 8'b11011010,
    					d8 = 8'b10000000,
    					d9 = 8'b10010000,
						dp = 8'b01111111,
						dnone = 8'b00001111;
	 always @( dispdata or dot) begin
				case(dispdata)
				4'b0000: N = d0 & {dot,7'b1111111};
				4'b0001: N = d1 & {dot,7'b1111111};
				4'b0010: N = d2 & {dot,7'b1111111};
				4'b0011: N = d3 & {dot,7'b1111111};
				4'b0100: N = d4 & {dot,7'b1111111};
				4'b0101: N = d5 & {dot,7'b1111111};
				4'b0110: N = d6 & {dot,7'b1111111};
				4'b0111: N = d7 & {dot,7'b1111111};
				4'b1000: N = d8 & {dot,7'b1111111};
				4'b1001: N = d9 & {dot,7'b1111111};
				4'b1010,4'b1011,4'b1100,4'b1101,4'b1110,4'b1111: N = dnone;
				endcase				
	 end
	 assign yearten = year[1];
	 assign yearls = year[0];
	 assign leapyear = ~((yearten[0]^yearls[1])|yearls[0]);
	 
	 //code for display:
	 always @(posedge clk or negedge b1) begin
		if( b1 == 0) scan <= 0;
		else scan <= scan+1;
	 end
	 
	 always @(screen or scan[10:9] or year[3] or year[2] or year[1] or year[0] or
					month[1] or month[0] or day[1] or day[0] or hour[1] or hour[0] 
					or min[1] or min[0] or sec[1] or sec[0]) begin
		case({screen, scan[10:9]})
			4'b1100: begin dispdata = year[3]; dot = 1; end 
			4'b1101: begin dispdata = year[2]; dot = 1 ;end
			4'b1110: begin dispdata = year[1]; dot = 1 ;end
			4'b1111: begin dispdata = year[0]; dot = 1; end
			4'b1000: begin dispdata = month[1];	dot = 1; end
			4'b1001: begin dispdata = month[0];	dot = 0; end
			4'b1010: begin dispdata = day[1];	dot = 1 ; end
			4'b1011: begin dispdata = day[0];	dot = 1 ;end
			4'b0100: begin dispdata = hour[1];	dot = 1 ;end
			4'b0101: begin dispdata = hour[0];	dot = 0; end
			4'b0110: begin dispdata = min[1];	dot = 1; end
			4'b0111: begin dispdata = min[0];	dot = 1; end
			4'b0000: begin dispdata = min[1];	dot = 1; end
			4'b0001: begin dispdata = min[0];	dot = 0; end
			4'b0010: begin dispdata = sec[1];	dot = 1; end
			4'b0011: begin dispdata = sec[0];	dot = 1; end
			default: begin dispdata = 4'b0000;	dot = 1; end
		endcase
	 end
	 
/*	 always @(scan[10:9] or min[1] or min[0] or sec[1] or sec[0]) begin
		case(scan[10:9])
			2'b00: dispdata = min[1];
			2'b01: dispdata = min[0];
			2'b10: dispdata = sec[1];
			2'b11: dispdata = sec[0];
		endcase
	 end*/
	 always @(scan[10:9]) begin
		case(scan[10:9])
			2'b11: ptmp = 4'b1000;
			2'b10: ptmp = 4'b0100;
			2'b01: ptmp = 4'b0010;
			2'b00: ptmp = 4'b0001;
		endcase
	 end
 
	 //code for state machine:
	 always @(negedge b4 or negedge b1) 
		begin
			if(b1 == 0)	screen <= 2'b00;
			else begin
				case(screen)
				2'b00: screen<=2'b01;
				2'b01: screen<=2'b10;
				2'b10: screen<=2'b11;
				2'b11: screen<=2'b00;
				default: screen<=2'b00;	
				endcase
			end
		end
		
		always @(negedge b3 or negedge b1) begin
			if(b1 == 0) state <= 3'b000;
			else begin
				case(state)
				3'b000: state<=3'b100;
				3'b100: state<=3'b101;
				3'b101: begin if( screen == 2'b11) state<=3'b110; else state<=3'b000; end
				3'b110: state<=3'b111;
				3'b111: state<=3'b000;
				default: state<=3'b000;
				endcase
			end
		end
		
		always @(state) begin
			if(state[2]==0) begin 
				enable = 1;
				sven = 0; mven = 0; hven = 0; dven = 0; monthven = 0; y1ven=0; y2ven=0; y3ven=0; y4ven=0;
			end
			else begin
				enable = 0;
				case({screen,state[1:0]})
				4'b0100: 
					begin
						sven = 1; mven = 1; hven = 0; dven = 1; monthven = 1; y1ven=1; y2ven=1; y3ven=1; y4ven=1;
					end
				4'b0101: 
					begin
						sven = 1; mven = 0; hven = 1; dven = 1; monthven = 1; y1ven=1; y2ven=1; y3ven=1; y4ven=1;
					end
				4'b0000: 
					begin
						sven = 1; mven = 0; hven = 1; dven = 1; monthven = 1; y1ven=1; y2ven=1; y3ven=1; y4ven=1;
					end
				4'b0001:
					begin
						sven = 0; mven = 1; hven = 1; dven = 1; monthven = 1; y1ven=1; y2ven=1; y3ven=1; y4ven=1;
					end
				4'b1000: 
					begin
						sven = 1; mven = 1; hven = 1; dven = 1; monthven = 0; y1ven=1; y2ven=1; y3ven=1; y4ven=1;
					end
				4'b1001: 
					begin
						sven = 1; mven = 1; hven = 1; dven = 0; monthven = 1; y1ven=1; y2ven=1; y3ven=1; y4ven=1;
					end
				4'b1100: 
					begin
						sven = 1; mven = 1; hven = 1; dven = 1; monthven = 1; y1ven=1; y2ven=1; y3ven=1; y4ven=0;
					end
				4'b1101: 
					begin
						sven = 1; mven = 1; hven = 1; dven = 1; monthven = 1; y1ven=1; y2ven=1; y3ven=0; y4ven=1;
					end
				4'b1110: 
					begin
						sven = 1; mven = 1; hven = 1; dven = 1; monthven = 1; y1ven=1; y2ven=0; y3ven=1; y4ven=1;
					end
				4'b1111: 
					begin
						sven = 1; mven = 1; hven = 1; dven = 1; monthven = 1; y1ven=0; y2ven=1; y3ven=1; y4ven=1;
					end
				default: 
					begin
						sven = 1; mven = 1; hven = 1; dven = 1; monthven = 1; y1ven=1; y2ven=1; y3ven=1; y4ven=1;
					end
				endcase
			end
		end
		
		always @(screen or state) begin
			if(state[2] == 0) pmask = 4'b1111;
			else if(screen == 2'b11) begin
				case(state[1:0])
				2'b00: pmask = 4'b0001;
				2'b01: pmask = 4'b0010;
				2'b10: pmask = 4'b0100;
				2'b11: pmask = 4'b1000;
				endcase
			end
			else begin
				case(state[1:0])
				2'b00: pmask = 4'b0011;
				2'b01: pmask = 4'b1100;
				default: pmask = 4'b0000;
				endcase
			end
		end
		
		assign P = ptmp & pmask;
		
		
		//code for verdict the month:
		assign monthmsb = month[1];
		assign monthlsb = month[0];
		assign bigmonth = monthmsb[0]^monthlsb[3]^monthlsb[0];
		assign feb = ~monthlsb[3]&~monthlsb[2]&monthlsb[1]&~monthlsb[0]& ~bigmonth;

		always @(leapyear or bigmonth or feb) begin
			if(feb == 1 && leapyear == 0)begin daynummsb = 4'd2; daynumlsb = 4'd8; end
			else if(feb == 1 && leapyear == 1)begin daynummsb = 4'd2;daynumlsb = 4'd9;end
			else if(bigmonth == 1)begin daynummsb = 4'd3;daynumlsb = 4'd1;end
			else begin daynummsb = 4'd3;daynumlsb = 4'd0;end
		end
		
		//code for counters:
		assign sclkbuf = sclk|~b2;//to enable signals, 1 for clk and 0 for b2 
		assign mclkbuf = mclk|~b2;
		assign hclkbuf = hclk|~b2;
		assign daycbuf = dayc|~b2;
		assign moncbuf = monc|~b2;
		assign y1buf = year1c|~b2;
		assign y2buf = year2c|~b2;
		assign y3buf = year3c|~b2;
		assign y4buf = year4c|~b2;
		
		//code for frequency dividing:
		always @(posedge clk or negedge b1) begin
			if(b1 == 0)begin divcounter<=0; sclk<=0;end
			else begin
				if(divcounter == SEC)begin
					divcounter <= 0;
					if(enable == 1) sclk <= 1;
					else sclk<=0;
				end
				else begin
					divcounter <= divcounter+1;
					sclk <= 0; 
				end
			end
		end
		always @(posedge sclkbuf or negedge b1) begin
			if(b1 == 0)begin sec[1]=0;sec[0]=0;mclk=0;end
			else if(sven == 1)begin sec[1] = sec[1]; sec[0] = sec[0]; mclk = 0; end
			else begin
				if(sec[0]==4'd9)begin sec[1]=sec[1]+1;sec[0]=0;end
				else begin sec[1]=sec[1];sec[0]=sec[0]+1;end
				if(sec[1]==4'd6)begin sec[1]=0; mclk=1; end
				else begin sec[1]=sec[1]; mclk=0; end
			end
		end
		
		always @(posedge mclkbuf or negedge b1) begin
			if(b1 == 0)begin min[1]=1;min[0]=5;hclk=0;end
			else if(mven == 1)begin min[1] = min[1]; min[0] = min[0]; hclk = 0; end
			else begin
				if(min[0]==4'd9)begin min[1]=min[1]+1;min[0]=0;end
				else begin min[1]=min[1];min[0]=min[0]+1;end
				if(min[1]==4'd6)begin min[1]=0; hclk=1; end
				else begin min[1]=min[1]; hclk=0; end
			end
		end
		
		always @(posedge hclkbuf or negedge b1) begin
			if(b1 == 0)begin hour[1]=1;hour[0]=1;dayc=0;end
			else if(hven == 1)begin hour[1] = hour[1]; hour[0] = hour[0]; dayc = 0;end
			else begin
				if(hour[1] == 2 && hour[0]==3)begin hour[1]=0; hour[0]=0; dayc=1; end
				else if(hour[0] == 9)
					begin hour[1] = hour[1] + 1; hour[0] = 0 ; dayc = 0;end
				else begin hour[0] = hour[0]+1; hour[1]=hour[1]; dayc=0; end
			end
			//else begin hour[1] = hour[1] ; hour[0] = hour[0]; dayc=0; end
		end
		
		always @(posedge daycbuf or negedge b1) begin
			if(b1 == 0)begin day[1]=2;day[0]=8;monc=0;end
			else if(dven == 1)begin day[1] = day[1]; day[0] = day[0]; monc = 0; end
			else begin
				if(day[1] == daynummsb && day[0] == daynumlsb)
					begin day[1] = 0; day[0] = 1; monc = 1; end
				else if(day[0] == 9)
					begin day[1] = day[1]+1; day[0]=0; monc = 0; end
				else begin
					day[0] = day[0]+1; day[1] = day[1]; monc = 0;
				end
			end
			//else begin day[1]=day[1]; day[0]=day[0]; monc=0; end
		end
		
		always @(posedge moncbuf or negedge b1) begin
			if(b1 == 0)begin month[1]=0;month[0]=7;year1c=0;end
			else if(monthven == 1)
				begin month[1] = month[1]; month[0]=month[0]; year1c = 0; end
			else begin
				if(month[1] == 1 && month[0] == 2) begin
					month[1]=0; month[0]=1; year1c = 1; 
				end
				else if(month[0] == 9) begin
					month[1] = month[1]+1; month[0] = 0; year1c =0;
				end
				else begin
					month[1] = month[1]; month[0] = month[0]+1; year1c = 0;
				end
			end
			//else begin month[1] = month[1]; month[0] = month[0]; year1c = 0; end
		end
		//counters for year:
		always @(posedge y1buf or negedge b1) begin
			if(b1 == 0)begin year[0]=7;year2c=0;end
			else if(y1ven == 1)begin year[0] = year[0]; year2c = 0; end
			else begin
				if(year[0]==9)begin year[0]=0; year2c=1; end
				else begin year[0]=year[0]+1; year2c = 0; end
			end
		end		
		always @(posedge y2buf or negedge b1) begin
			if(b1 == 0)begin year[1]=0;year3c=0;end
			else if(y2ven == 1)begin year[1] = year[1]; year3c = 0; end
			else begin
				if(year[1]==9)begin year[1]=0; year3c=1; end
				else begin year[1]=year[1]+1; year3c = 0; end
			end
		end
		always @(posedge y3buf or negedge b1) begin
			if(b1 == 0)begin year[2]=0;year4c = 0;end
			else if(y3ven == 1)begin year[2] = year[2]; year4c = 0 ;end
			else begin
				if(year[2]==9)begin year[2]=0; year4c=1; end
				else begin year[2]=year[2]+1; year4c = 0; end
			end
		end
		always @(posedge y4buf or negedge b1) begin
			if(b1 == 0) year[3]=2;
			else if(y4ven == 1)begin year[3] = year[3]; end
			else begin
				if(year[3]==9)begin year[3]=0; end
				else begin year[3]=year[3]+1; end
			end
		end
		
endmodule