pxl.state,1

cadence公司pcb内部培训的资料,并且附带其中的例子程序!比市面上任何一本cadence的书好!

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(3)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(3)';
PHY_SIGNAL = 'RD3';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(4)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(4)';
PHY_SIGNAL = 'RD4';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(5)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(5)';
PHY_SIGNAL = 'RD5';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(6)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(6)';
PHY_SIGNAL = 'RD6';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(7)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):RD(7)';
PHY_SIGNAL = 'RD7';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(0)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(0)';
PHY_SIGNAL = 'VD0';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(1)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(1)';
PHY_SIGNAL = 'VD1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(2)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(2)';
PHY_SIGNAL = 'VD2';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(3)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(3)';
PHY_SIGNAL = 'VD3';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(4)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(4)';
PHY_SIGNAL = 'VD4';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(5)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(5)';
PHY_SIGNAL = 'VD5';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(6)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(6)';
PHY_SIGNAL = 'VD6';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(7)';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):VD(7)';
PHY_SIGNAL = 'VD7';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = 'NC';
LOG_SIGNAL = 'NC';
PHY_SIGNAL = 'NC';
END_SIGNAL;

END_MODULE; { end of module '@PROJECT1_LIB.ROOT(SCH_1)'}

{--------------------------------------------------------------------------}

BEGIN_MODULE: 'ROOT' = '@PROJECT1_LIB.ROOT(SCH_1)';
PAGE = '2';

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]8282A(CHIPS)';
LOCATION   = 'U5';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/epf8282a/chips/chips.prt';
 PART_NAME = 'EPF8282A_PLCC-BASE';
 PARENT_PPT = 'EPF8282A';
 PARENT_PPT_PART = 'EPF8282A_PLCC-BASE';
 PARENT_CHIPS_PHYS_PART = 'EPF8282A_PLCC';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]574(CHIPS)';
LOCATION   = 'U6';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/act574/chips/chips.prt';
 PART_NAME = 'ACT574_SOIC-BASE';
 PARENT_PPT = 'ACT574';
 PARENT_PPT_PART = 'ACT574_SOIC-BASE';
 PARENT_CHIPS_PHYS_PART = 'ACT574_SOIC';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)';
LOCATION   = 'C5';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/cap/chips/chips.prt';
 PART_NAME = 'CAP_SMDCAP-47PF,10%';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SMDCAP-47PF,10%';
 PARENT_CHIPS_PHYS_PART = 'CAP_SMDCAP';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)';
LOCATION   = 'C6';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/cap/chips/chips.prt';
 PART_NAME = 'CAP_SMDCAP-47PF,10%';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SMDCAP-47PF,10%';
 PARENT_CHIPS_PHYS_PART = 'CAP_SMDCAP';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)';
LOCATION   = 'L1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/inductor/chips/chips.prt';
 PART_NAME = 'INDUCTOR_TH-50UH,5%';
 PARENT_PPT = 'INDUCTOR';
 PARENT_PPT_PART = 'INDUCTOR_TH-50UH,5%';
 PARENT_CHIPS_PHYS_PART = 'INDUCTOR_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)';
LOCATION   = 'L2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/inductor/chips/chips.prt';
 PART_NAME = 'INDUCTOR_TH-50UH,5%';
 PARENT_PPT = 'INDUCTOR';
 PARENT_PPT_PART = 'INDUCTOR_TH-50UH,5%';
 PARENT_CHIPS_PHYS_PART = 'INDUCTOR_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_CONN(CHIPS)';
LOCATION   = 'J2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/bnc_conn/chips/chips.prt';
 PART_NAME = 'BNC_CONN_PCMOUNT-BASE';
 PARENT_PPT = 'BNC_CONN';
 PARENT_PPT_PART = 'BNC_CONN_PCMOUNT-BASE';
 PARENT_CHIPS_PHYS_PART = 'BNC_CONN';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_CONN(CHIPS)';
LOCATION   = 'J3';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/bnc_conn/chips/chips.prt';
 PART_NAME = 'BNC_CONN_PCMOUNT-BASE';
 PARENT_PPT = 'BNC_CONN';
 PARENT_PPT_PART = 'BNC_CONN_PCMOUNT-BASE';
 PARENT_CHIPS_PHYS_PART = 'BNC_CONN';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_DIODE(CHIPS)';
LOCATION   = 'D1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/photo_diode/chips/chips.prt';
 PART_NAME = 'PHOTO_DIODE_TH-BASE';
 PARENT_PPT = 'PHOTO_DIODE';
 PARENT_PPT_PART = 'PHOTO_DIODE_TH-BASE';
 PARENT_CHIPS_PHYS_PART = 'PHOTO_DIODE_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_DIODE(CHIPS)';
LOCATION   = 'D2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/photo_diode/chips/chips.prt';
 PART_NAME = 'PHOTO_DIODE_TH-BASE';
 PARENT_PPT = 'PHOTO_DIODE';
 PARENT_PPT_PART = 'PHOTO_DIODE_TH-BASE';
 PARENT_CHIPS_PHYS_PART = 'PHOTO_DIODE_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_DIODE(CHIPS)';
LOCATION   = 'D3';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/photo_diode/chips/chips.prt';
 PART_NAME = 'PHOTO_DIODE_TH-BASE';
 PARENT_PPT = 'PHOTO_DIODE';
 PARENT_PPT_PART = 'PHOTO_DIODE_TH-BASE';
 PARENT_CHIPS_PHYS_PART = 'PHOTO_DIODE_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_DIODE(CHIPS)';
LOCATION   = 'D4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/photo_diode/chips/chips.prt';
 PART_NAME = 'PHOTO_DIODE_TH-BASE';
 PARENT_PPT = 'PHOTO_DIODE';
 PARENT_PPT_PART = 'PHOTO_DIODE_TH-BASE';
 PARENT_CHIPS_PHYS_PART = 'PHOTO_DIODE_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)';
LOCATION   = 'R5';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/res/chips/chips.prt';
 PART_NAME = 'RES_SMDRES-2K,2%';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SMDRES-2K,2%';
 PARENT_CHIPS_PHYS_PART = 'RES_SMDRES';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)';
LOCATION   = 'R1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/res/chips/chips.prt';
 PART_NAME = 'RES_SMDRES-150,2%';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SMDRES-150,2%';
 PARENT_CHIPS_PHYS_PART = 'RES_SMDRES';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)';
LOCATION   = 'R2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/res/chips/chips.prt';
 PART_NAME = 'RES_SMDRES-150,2%';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SMDRES-150,2%';
 PARENT_CHIPS_PHYS_PART = 'RES_SMDRES';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)';
LOCATION   = 'R3';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/res/chips/chips.prt';
 PART_NAME = 'RES_SMDRES-150,2%';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SMDRES-150,2%';
 PARENT_CHIPS_PHYS_PART = 'RES_SMDRES';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)';
LOCATION   = 'R4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/res/chips/chips.prt';
 PART_NAME = 'RES_SMDRES-150,2%';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SMDRES-150,2%';
 PARENT_CHIPS_PHYS_PART = 'RES_SMDRES';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]1064(CHIPS)';
LOCATION   = 'U7';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/epc1064/chips/chips.prt';
 PART_NAME = 'EPC1064_DIP-BASE';
 PARENT_PPT = 'EPC1064';
 PARENT_PPT_PART = 'EPC1064_DIP-BASE';
 PARENT_CHIPS_PHYS_PART = 'EPC1064_DIP';
END_LIB_INFO;
END_PRIM;

BEGIN_SIGNAL:
CANON_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):UNNAMED_2_EPF8282A_I1_VCLKC';
LOG_SIGNAL = '@PROJECT1_LIB.ROOT(SCH_1):UNNAMED_2_EPF8282A_I1_VCLKC';
PHY_SIGNAL = 'UNNAMED_2_EPF8282A_I1_VCLKC';
END_SIGNAL;

{--------------------------------------------------------------------------}

BEGIN_MODULE: 'HIGH_SPEED_RAM' = '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I19@PROJECT1_LIB.HIGH_SPEED_RAM(SCH_1)';
PAGE = '1';

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I19@PROJECT1_LIB.HIGH_SPEED_RAM(SCH_1):[e-mail]55B4257(CHIPS)';
LOCATION   = 'U10';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/tc55b4257/chips/chips.prt';
 PART_NAME = 'TC55B4257_SOIC-BASE';
 PARENT_PPT = 'TC55B4257';
 PARENT_PPT_PART = 'TC55B4257_SOIC-BASE';
 PARENT_CHIPS_PHYS_PART = 'TC55B4257_SOIC';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I19@PROJECT1_LIB.HIGH_SPEED_RAM(SCH_1):[e-mail]55B4257(CHIPS)';
LOCATION   = 'U11';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/tc55b4257/chips/chips.prt';
 PART_NAME = 'TC55B4257_SOIC-BASE';
 PARENT_PPT = 'TC55B4257';
 PARENT_PPT_PART = 'TC55B4257_SOIC-BASE';
 PARENT_CHIPS_PHYS_PART = 'TC55B4257_SOIC';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I19@PROJECT1_LIB.HIGH_SPEED_RAM(SCH_1):[e-mail]55B4257(CHIPS)';
LOCATION   = 'U15';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/tc55b4257/chips/chips.prt';
 PART_NAME = 'TC55B4257_SOIC-BASE';
 PARENT_PPT = 'TC55B4257';
 PARENT_PPT_PART = 'TC55B4257_SOIC-BASE';
 PARENT_CHIPS_PHYS_PART = 'TC55B4257_SOIC';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I19@PROJECT1_LIB.HIGH_SPEED_RAM(SCH_1):[e-mail]55B4257(CHIPS)';
LOCATION   = 'U14';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/tc55b4257/chips/chips.prt';
 PART_NAME = 'TC55B4257_SOIC-BASE';
 PARENT_PPT = 'TC55B4257';
 PARENT_PPT_PART = 'TC55B4257_SOIC-BASE';
 PARENT_CHIPS_PHYS_PART = 'TC55B4257_SOIC';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I19@PROJECT1_LIB.HIGH_SPEED_RAM(SCH_1):[e-mail]_NP(CHIPS)';
LOCATION   = 'C15';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/cap_np/chips/chips.prt';
 PART_NAME = 'CAP_NP_SMDCAP-.1UF,+20%/-80%';
 PARENT_PPT = 'CAP_NP';
 PARENT_PPT_PART = 'CAP_NP_SMDCAP-.1UF,+20%/-80%';
 PARENT_CHIPS_PHYS_PART = 'CAP_NP_SMDCAP';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I19@PROJECT1_LIB.HIGH_SPEED_RAM(SCH_1):[e-mail]_NP(CHIPS)';
LOCATION   = 'C18';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/cap_np/chips/chips.prt';
 PART_NAME = 'CAP_NP_SMDCAP-.1UF,+20%/-80%';
 PARENT_PPT = 'CAP_NP';
 PARENT_PPT_PART = 'CAP_NP_SMDCAP-.1UF,+20%/-80%';
 PARENT_CHIPS_PHYS_PART = 'CAP_NP_SMDCAP';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I19@PROJECT1_LIB.HIGH_SPEED_RAM(SCH_1):[e-mail]_NP(CHIPS)';
LOCATION   = 'C17';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/cap_np/chips/chips.prt';
 PART_NAME = 'CAP_NP_SMDCAP-.1UF,+20%/-80%';
 PARENT_PPT = 'CAP_NP';
 PARENT_PPT_PART = 'CAP_NP_SMDCAP-.1UF,+20%/-80%';
 PARENT_CHIPS_PHYS_PART = 'CAP_NP_SMDCAP';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I19@PROJECT1_LIB.HIGH_SPEED_RAM(SCH_1):[e-mail]_NP(CHIPS)';
LOCATION   = 'C16';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = './classlib/cap_np/chips/chips.prt';