pstxprt.dat,2

cadence公司pcb内部培训的资料,并且附带其中的例子程序!比市面上任何一本cadence的书好!

PART_NAME
 C23 'CAP_SMDCAP-.01UF,10%':
 ROOM='CHAN1';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I56@PROJECT1_LIB.DAAMP(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i56@~
project1_lib.daamp(sch_1):[e-mail](chips)',
 PATH='I8',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-2700,4000)',
 VER='2',
 ROT='0',
 VALUE='.01UF',
 TOLERENCE='10%',
 CDS_LIB='classlib',
 PACK_TYPE='SMDCAP',
 ROOM='CHAN1',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/cap/chips/chips.prt';

PART_NAME
 C24 'CAP_SMDCAP-.01UF,10%':
 ROOM='CHAN1';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I56@PROJECT1_LIB.DAAMP(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i56@~
project1_lib.daamp(sch_1):[e-mail](chips)',
 PATH='I4',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-2000,1650)',
 VER='2',
 ROT='0',
 VALUE='.01UF',
 TOLERENCE='10%',
 CDS_LIB='classlib',
 PACK_TYPE='SMDCAP',
 ROOM='CHAN1',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/cap/chips/chips.prt';

PART_NAME
 C25 'CAP_NP_SMDCAP-.1UF,+20%/-80%':
 ROOM='CHAN1';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I56@PROJECT1_LIB.DAAMP(SCH_1):[e-mail]_NP(CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i56@~
project1_lib.daamp(sch_1):[e-mail]_np(chips)',
 PATH='I5',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-100,2500)',
 VER='2',
 ROT='0',
 VALUE='.1UF',
 TOLERENCE='+20%/-80%',
 PACK_TYPE='SMDCAP',
 CDS_LIB='classlib',
 ROOM='CHAN1',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/cap_np/chips/chips.prt';

PART_NAME
 C26 'CAP_SMDCAP-.01UF,10%':
 ROOM='CHAN2';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I57@PROJECT1_LIB.DAAMP(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i57@~
project1_lib.daamp(sch_1):[e-mail](chips)',
 PATH='I8',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-2700,4000)',
 VER='2',
 ROT='0',
 VALUE='.01UF',
 TOLERENCE='10%',
 CDS_LIB='classlib',
 PACK_TYPE='SMDCAP',
 ROOM='CHAN2',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/cap/chips/chips.prt';

PART_NAME
 C27 'CAP_SMDCAP-.01UF,10%':
 ROOM='CHAN2';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I57@PROJECT1_LIB.DAAMP(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i57@~
project1_lib.daamp(sch_1):[e-mail](chips)',
 PATH='I4',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-2000,1650)',
 VER='2',
 ROT='0',
 VALUE='.01UF',
 TOLERENCE='10%',
 CDS_LIB='classlib',
 PACK_TYPE='SMDCAP',
 ROOM='CHAN2',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/cap/chips/chips.prt';

PART_NAME
 C28 'CAP_NP_SMDCAP-.1UF,+20%/-80%':
 ROOM='CHAN2';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I57@PROJECT1_LIB.DAAMP(SCH_1):[e-mail]_NP(CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i57@~
project1_lib.daamp(sch_1):[e-mail]_np(chips)',
 PATH='I5',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-100,2500)',
 VER='2',
 ROT='0',
 VALUE='.1UF',
 TOLERENCE='+20%/-80%',
 PACK_TYPE='SMDCAP',
 CDS_LIB='classlib',
 ROOM='CHAN2',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/cap_np/chips/chips.prt';

PART_NAME
 D1 'PHOTO_DIODE_TH-BASE':
 ROOM='LED';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_DIODE(CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail]_diode(chips)',
 PATH='I9',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 XY='(1600,4450)',
 VER='4',
 ROT='4',
 LOCATION='D1',
 ROOM='LED',
 PACK_TYPE='TH',
 CDS_LIB='classlib',
 PRIM_FILE='./classlib/photo_diode/chips/chips.prt';

PART_NAME
 D2 'PHOTO_DIODE_TH-BASE':
 ROOM='LED';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_DIODE(CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail]_diode(chips)',
 PATH='I10',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 XY='(1950,4450)',
 VER='4',
 ROT='4',
 LOCATION='D2',
 ROOM='LED',
 PACK_TYPE='TH',
 CDS_LIB='classlib',
 PRIM_FILE='./classlib/photo_diode/chips/chips.prt';

PART_NAME
 D3 'PHOTO_DIODE_TH-BASE':
 ROOM='LED';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_DIODE(CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail]_diode(chips)',
 PATH='I11',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 XY='(2300,4450)',
 VER='4',
 ROT='4',
 LOCATION='D3',
 ROOM='LED',
 CDS_LIB='classlib',
 PACK_TYPE='TH',
 PRIM_FILE='./classlib/photo_diode/chips/chips.prt';

PART_NAME
 D4 'PHOTO_DIODE_TH-BASE':
 ROOM='LED';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_DIODE(CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail]_diode(chips)',
 PATH='I12',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 XY='(2650,4450)',
 VER='4',
 ROT='4',
 LOCATION='D4',
 ROOM='LED',
 CDS_LIB='classlib',
 PACK_TYPE='TH',
 PRIM_FILE='./classlib/photo_diode/chips/chips.prt';

PART_NAME
 J1 'CONN64_PCMOUNT-BASE':;

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]64(CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail]64(chips)',
 PATH='I1',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE1',
 XY='(-4350,3400)',
 VER='1',
 ROT='0',
 HARD_LOCATION='TRUE',
 PACK_TYPE='PCMOUNT',
 CDS_LIB='classlib',
 PRIM_FILE='./classlib/conn64/chips/chips.prt';

PART_NAME
 J2 'BNC_CONN_PCMOUNT-BASE':
 ROOM='CHAN1';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_CONN(CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail]_conn(chips)',
 PATH='I7',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 ROOM='CHAN1',
 HARD_LOCATION='TRUE',
 XY='(1750,2100)',
 VER='1',
 ROT='0',
 CDS_LIB='classlib',
 PACK_TYPE='PCMOUNT',
 PRIM_FILE='./classlib/bnc_conn/chips/chips.prt';

PART_NAME
 J3 'BNC_CONN_PCMOUNT-BASE':
 ROOM='CHAN2';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail]_CONN(CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail]_conn(chips)',
 PATH='I8',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 ROOM='CHAN2',
 HARD_LOCATION='TRUE',
 XY='(1750,1400)',
 VER='1',
 ROT='0',
 PACK_TYPE='PCMOUNT',
 CDS_LIB='classlib',
 PRIM_FILE='./classlib/bnc_conn/chips/chips.prt';

PART_NAME
 L1 'INDUCTOR_TH-50UH,5%':
 ROOM='CHAN1';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail](chips)',
 PATH='I5',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 ROOM='CHAN1',
 XY='(650,2150)',
 VER='1',
 ROT='0',
 TOLERENCE='5%',
 VALUE='50UH',
 CDS_LIB='classlib',
 PACK_TYPE='TH',
 PRIM_FILE='./classlib/inductor/chips/chips.prt';

PART_NAME
 L2 'INDUCTOR_TH-50UH,5%':
 ROOM='CHAN2';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail](chips)',
 PATH='I6',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 ROOM='CHAN2',
 XY='(700,1450)',
 VER='1',
 ROT='0',
 TOLERENCE='5%',
 VALUE='50UH',
 PACK_TYPE='TH',
 CDS_LIB='classlib',
 PRIM_FILE='./classlib/inductor/chips/chips.prt';

PART_NAME
 L3 'INDUCTOR_TH-50UH,5%':
 ROOM='CHAN1';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I56@PROJECT1_LIB.DAAMP(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i56@~
project1_lib.daamp(sch_1):[e-mail](chips)',
 PATH='I3',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-2550,1850)',
 VER='1',
 ROT='0',
 TOLERENCE='5%',
 VALUE='50UH',
 CDS_LIB='classlib',
 PACK_TYPE='TH',
 ROOM='CHAN1',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/inductor/chips/chips.prt';

PART_NAME
 L4 'INDUCTOR_TH-50UH,5%':
 ROOM='CHAN1';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I56@PROJECT1_LIB.DAAMP(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i56@~
project1_lib.daamp(sch_1):[e-mail](chips)',
 PATH='I2',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-2150,3850)',
 VER='1',
 ROT='0',
 VALUE='50UH',
 TOLERENCE='5%',
 PACK_TYPE='TH',
 CDS_LIB='classlib',
 ROOM='CHAN1',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/inductor/chips/chips.prt';

PART_NAME
 L5 'INDUCTOR_TH-50UH,5%':
 ROOM='CHAN2';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I57@PROJECT1_LIB.DAAMP(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i57@~
project1_lib.daamp(sch_1):[e-mail](chips)',
 PATH='I3',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-2550,1850)',
 VER='1',
 ROT='0',
 TOLERENCE='5%',
 VALUE='50UH',
 CDS_LIB='classlib',
 PACK_TYPE='TH',
 ROOM='CHAN2',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/inductor/chips/chips.prt';

PART_NAME
 L6 'INDUCTOR_TH-50UH,5%':
 ROOM='CHAN2';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):PAGE2_I20@PROJECT1_LIB.DATA(SCH_1):PAGE1_I57@PROJECT1_LIB.DAAMP(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):page2_i20@project1_lib.data(sch_1):page1_i57@~
project1_lib.daamp(sch_1):[e-mail](chips)',
 PATH='I2',
 DRAWING='@PROJECT1_LIB.DAAMP(SCH_1):PAGE1',
 XY='(-2150,3850)',
 VER='1',
 ROT='0',
 VALUE='50UH',
 TOLERENCE='5%',
 PACK_TYPE='TH',
 CDS_LIB='classlib',
 ROOM='CHAN2',
 USE2='work.all',
 USE1='ieee.std_logic_1164.all',
 LIBRARY1='ieee',
 PRIM_FILE='./classlib/inductor/chips/chips.prt';

PART_NAME
 R1 'RES_SMDRES-150,2%':
 ROOM='LED';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail](chips)',
 PATH='I14',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 XY='(1600,4100)',
 VER='2',
 ROT='4',
 TOLERENCE='2%',
 LOCATION='R1',
 VALUE='150',
 ROOM='LED',
 CDS_LIB='classlib',
 PACK_TYPE='SMDRES',
 PRIM_FILE='./classlib/res/chips/chips.prt';

PART_NAME
 R2 'RES_SMDRES-150,2%':
 ROOM='LED';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail](chips)',
 PATH='I15',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 XY='(1950,4100)',
 VER='2',
 ROT='4',
 VALUE='150',
 TOLERENCE='2%',
 LOCATION='R2',
 ROOM='LED',
 CDS_LIB='classlib',
 PACK_TYPE='SMDRES',
 PRIM_FILE='./classlib/res/chips/chips.prt';

PART_NAME
 R3 'RES_SMDRES-150,2%':
 ROOM='LED';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail](chips)',
 PATH='I16',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 XY='(2300,4100)',
 VER='2',
 ROT='4',
 LOCATION='R3',
 TOLERENCE='2%',
 VALUE='150',
 ROOM='LED',
 CDS_LIB='classlib',
 PACK_TYPE='SMDRES',
 PRIM_FILE='./classlib/res/chips/chips.prt';

PART_NAME
 R4 'RES_SMDRES-150,2%':
 ROOM='LED';

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail](chips)',
 PATH='I17',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 XY='(2650,4100)',
 VER='2',
 ROT='4',
 TOLERENCE='2%',
 VALUE='150',
 LOCATION='R4',
 ROOM='LED',
 CDS_LIB='classlib',
 PACK_TYPE='SMDRES',
 PRIM_FILE='./classlib/res/chips/chips.prt';

PART_NAME
 R5 'RES_SMDRES-2K,2%':;

SECTION_NUMBER 1
 '@PROJECT1_LIB.ROOT(SCH_1):[e-mail](CHIPS)':
 C_PATH='@project1_lib.root(sch_1):[e-mail](chips)',
 PATH='I13',
 DRAWING='@PROJECT1_LIB.ROOT(SCH_1):PAGE2',
 XY='(-1950,1550)',