verilog.v

来自「cadence公司pcb内部培训的资料,并且附带其中的例子程序!比市面上任何一本」· Verilog 代码 · 共 33 行

// generated by newgenasym  Thu Mar 22 14:41:46 2001


module tlc5602 (agnd1, aout, avcc1, avcc2, clk, comp, d0, d1, d2, d3, d4, d5, d6,
        d7, gnd1, nc1, nc2, ref, vcc1, vcc2);
    inout agnd1;
    inout aout;
    inout avcc1;
    inout avcc2;
    input clk;
    input comp;
    input d0;
    input d1;
    input d2;
    input d3;
    input d4;
    input d5;
    input d6;
    input d7;
    inout gnd1;
    inout nc1;
    inout nc2;
    input ref;
    inout vcc1;
    inout vcc2;


    initial
        begin
        end

endmodule