elec_lock.map.eqn

本程序是用VHDL语言实现电子密码锁功能,整个系统分为三大模块,一为控制模块,二为键盘显示模块,三为处理模块

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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--D1_q[5] is lpm_counter:\counter:Q[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[5]
--operation mode is up_dn_cntr

D1_q[5]_lut_out = D1_q[5] $ D1L11;
D1_q[5] = DFFEA(D1_q[5]_lut_out, CLK_4M, , , , , );

--D1L25Q is lpm_counter:\counter:Q[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[5]~0
--operation mode is up_dn_cntr

D1L25Q = D1_q[5];


--D1_q[4] is lpm_counter:\counter:Q[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[4]
--operation mode is up_dn_cntr

D1_q[4]_lut_out = D1_q[4] $ D1L9;
D1_q[4] = DFFEA(D1_q[4]_lut_out, CLK_4M, , , , , );

--D1L23Q is lpm_counter:\counter:Q[0]_rtl_0|alt_counter_f10ke:wysi_counter|q[4]~1
--operation mode is up_dn_cntr

D1L23Q = D1_q[4];

--D1L11 is lpm_counter:\counter:Q[0]_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT
--operation mode is up_dn_cntr

D1L11 = CARRY(D1_q[4] & (D1L9));


--A1L182 is rtl~0
--operation mode is normal

A1L182 = D1_q[5] # D1_q[4];

--A1L202 is rtl~565
--operation mode is normal

A1L202 = D1_q[5] # D1_q[4];


--A1L186 is rtl~512
--operation mode is normal

A1L186 = D1_q[4] & (!D1_q[5]);

--A1L203 is rtl~566
--operation mode is normal

A1L203 = D1_q[4] & (!D1_q[5]);


--A1L183 is rtl~2
--operation mode is normal

A1L183 = D1_q[5] & (!D1_q[4]);

--A1L204 is rtl~567
--operation mode is normal

A1L204 = D1_q[5] & (!D1_q[4]);


--A1L261 is SEL~10
--operation mode is normal

A1L261 = D1_q[5] & D1_q[4];

--A1L262 is SEL~11
--operation mode is normal

A1L262 = D1_q[5] & D1_q[4];


--N[0] is N[0]
--operation mode is normal

N[0]_lut_out = A1L186 & !A1L99 & (C3L5 # !A1L100) # !A1L186 & (C3L5 # !A1L100);
N[0] = DFFEA(N[0]_lut_out, D1_q[0], , , , , );

--A1L119Q is N[0]~0
--operation mode is normal

A1L119Q = N[0];


--N[1] is N[1]
--operation mode is normal

N[1]_lut_out = A1L101 & D1_q[4] & (C1L5 # !A1L102) # !A1L101 & (C1L5 # !A1L102);
N[1] = DFFEA(N[1]_lut_out, D1_q[0], , , , , );

--A1L121Q is N[1]~1
--operation mode is normal

A1L121Q = N[1];


--N[3] is N[3]
--operation mode is normal

N[3]_lut_out = D1_q[5] & !A1L103 # !D1_q[5] & (!A1L104);
N[3] = DFFEA(N[3]_lut_out, D1_q[0], , , , , );

--A1L125Q is N[3]~2
--operation mode is normal

A1L125Q = N[3];


--N[2] is N[2]
--operation mode is normal

N[2]_lut_out = !A1L105 & (D1_q[4] # !A1L106);
N[2] = DFFEA(N[2]_lut_out, D1_q[0], , , , , );

--A1L123Q is N[2]~3
--operation mode is normal

A1L123Q = N[2];


--A1L92 is FN~27
--operation mode is normal

A1L92 = !N[2] # !N[3] # !N[1] # !N[0];

--A1L93 is FN~28
--operation mode is normal

A1L93 = !N[2] # !N[3] # !N[1] # !N[0];


--F[2] is F[2]
--operation mode is normal

F[2]_lut_out = A1L99 & D1_q[5] & D1_q[4];
F[2] = DFFEA(F[2]_lut_out, D1_q[0], , , , , );

--A1L85Q is F[2]~7
--operation mode is normal

A1L85Q = F[2];


--F[0] is F[0]
--operation mode is normal

F[0]_lut_out = D1_q[4] & A1L101;
F[0] = DFFEA(F[0]_lut_out, D1_q[0], , , , , );

--A1L83Q is F[0]~8
--operation mode is normal

A1L83Q = F[0];


--F[3] is F[3]
--operation mode is normal

F[3]_lut_out = !A1L107 # !D1_q[5];
F[3] = DFFEA(F[3]_lut_out, D1_q[0], , , , , );

--A1L87Q is F[3]~9
--operation mode is normal

A1L87Q = F[3];


--A1L88 is FF~17
--operation mode is normal

A1L88 = !F[3] & (F[2] $ F[0]);

--A1L89 is FF~19
--operation mode is normal

A1L89 = !F[3] & (F[2] $ F[0]);


--\key_decoder:R1 is \key_decoder:R1
--operation mode is normal

\key_decoder:R1_lut_out = \key_decoder:R0;
\key_decoder:R1 = DFFEA(\key_decoder:R1_lut_out, D1_q[0], , , , , );

--A1L4Q is \key_decoder:R1~1
--operation mode is normal

A1L4Q = \key_decoder:R1;


--\key_decoder:R0 is \key_decoder:R0
--operation mode is normal

\key_decoder:R0_lut_out = !F[3] & (F[2] $ F[0]);
\key_decoder:R0 = DFFEA(\key_decoder:R0_lut_out, D1_q[0], , , , , );

--A1L2Q is \key_decoder:R0~0
--operation mode is normal

A1L2Q = \key_decoder:R0;


--A1L180 is RR2~0
--operation mode is normal

A1L180 = \key_decoder:R1 & (!\key_decoder:R0);

--A1L181 is RR2~8
--operation mode is normal

A1L181 = \key_decoder:R1 & (!\key_decoder:R0);


--QA is QA
--operation mode is normal

QA_lut_out = F[2] # QA & A1L140;
QA = DFFEA(QA_lut_out, D1_q[0], , , A1L189, , );

--A1L141Q is QA~23
--operation mode is normal

A1L141Q = QA;


--QB is QB
--operation mode is normal

QB_lut_out = !F[2] & (QB # !A1L140);
QB = DFFEA(QB_lut_out, D1_q[0], , , A1L189, , );

--A1L144Q is QB~35
--operation mode is normal

A1L144Q = QB;


--A1L79 is ENLOCK~0
--operation mode is normal

A1L79 = QA & (!QB);

--A1L80 is ENLOCK~8
--operation mode is normal

A1L80 = QA & (!QB);


--NC[0] is NC[0]
--operation mode is normal

NC[0]_lut_out = !NC[0];
NC[0] = DFFEA(NC[0]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L129Q is NC[0]~4
--operation mode is normal

A1L129Q = NC[0];


--NC[1] is NC[1]
--operation mode is normal

NC[1]_lut_out = NC[0] $ NC[1];
NC[1] = DFFEA(NC[1]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L132Q is NC[1]~5
--operation mode is normal

A1L132Q = NC[1];


--NC[2] is NC[2]
--operation mode is normal

NC[2]_lut_out = NC[1] & NC[0];
NC[2] = DFFEA(NC[2]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L134Q is NC[2]~6
--operation mode is normal

A1L134Q = NC[2];


--ACC[0] is ACC[0]
--operation mode is normal

ACC[0]_lut_out = N[0];
ACC[0] = DFFEA(ACC[0]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L7Q is ACC[0]~144
--operation mode is normal

A1L7Q = ACC[0];


--ACC[1] is ACC[1]
--operation mode is normal

ACC[1]_lut_out = N[1];
ACC[1] = DFFEA(ACC[1]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L9Q is ACC[1]~145
--operation mode is normal

A1L9Q = ACC[1];


--ACC[2] is ACC[2]
--operation mode is normal

ACC[2]_lut_out = N[2];
ACC[2] = DFFEA(ACC[2]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L11Q is ACC[2]~146
--operation mode is normal

A1L11Q = ACC[2];


--ACC[3] is ACC[3]
--operation mode is normal

ACC[3]_lut_out = N[3];
ACC[3] = DFFEA(ACC[3]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L13Q is ACC[3]~147
--operation mode is normal

A1L13Q = ACC[3];


--ACC[4] is ACC[4]
--operation mode is normal

ACC[4]_lut_out = ACC[0];
ACC[4] = DFFEA(ACC[4]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L15Q is ACC[4]~148
--operation mode is normal

A1L15Q = ACC[4];


--ACC[5] is ACC[5]
--operation mode is normal

ACC[5]_lut_out = ACC[1];
ACC[5] = DFFEA(ACC[5]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L17Q is ACC[5]~149
--operation mode is normal

A1L17Q = ACC[5];


--ACC[6] is ACC[6]
--operation mode is normal

ACC[6]_lut_out = ACC[2];
ACC[6] = DFFEA(ACC[6]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L19Q is ACC[6]~150
--operation mode is normal

A1L19Q = ACC[6];


--ACC[7] is ACC[7]
--operation mode is normal

ACC[7]_lut_out = ACC[3];
ACC[7] = DFFEA(ACC[7]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L21Q is ACC[7]~151
--operation mode is normal

A1L21Q = ACC[7];


--ACC[8] is ACC[8]
--operation mode is normal

ACC[8]_lut_out = ACC[4];
ACC[8] = DFFEA(ACC[8]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L23Q is ACC[8]~152
--operation mode is normal

A1L23Q = ACC[8];


--ACC[9] is ACC[9]
--operation mode is normal

ACC[9]_lut_out = ACC[5];
ACC[9] = DFFEA(ACC[9]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L25Q is ACC[9]~153
--operation mode is normal

A1L25Q = ACC[9];


--ACC[10] is ACC[10]
--operation mode is normal

ACC[10]_lut_out = ACC[6];
ACC[10] = DFFEA(ACC[10]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L27Q is ACC[10]~154
--operation mode is normal

A1L27Q = ACC[10];


--ACC[11] is ACC[11]
--operation mode is normal

ACC[11]_lut_out = ACC[7];
ACC[11] = DFFEA(ACC[11]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L29Q is ACC[11]~155
--operation mode is normal

A1L29Q = ACC[11];


--ACC[12] is ACC[12]
--operation mode is normal

ACC[12]_lut_out = ACC[8];
ACC[12] = DFFEA(ACC[12]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L31Q is ACC[12]~156
--operation mode is normal

A1L31Q = ACC[12];


--ACC[13] is ACC[13]
--operation mode is normal

ACC[13]_lut_out = ACC[9];
ACC[13] = DFFEA(ACC[13]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L33Q is ACC[13]~157
--operation mode is normal

A1L33Q = ACC[13];


--ACC[14] is ACC[14]
--operation mode is normal

ACC[14]_lut_out = ACC[10];
ACC[14] = DFFEA(ACC[14]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L35Q is ACC[14]~158
--operation mode is normal

A1L35Q = ACC[14];


--ACC[15] is ACC[15]
--operation mode is normal

ACC[15]_lut_out = ACC[11];
ACC[15] = DFFEA(ACC[15]_lut_out, A1L92, !A1L180, , A1L128, , );

--A1L37Q is ACC[15]~159
--operation mode is normal

A1L37Q = ACC[15];


--A1L66 is DB[1]~120
--operation mode is normal

A1L66 = D1_q[4] & (D1_q[5]) # !D1_q[4] & (D1_q[5] & ACC[5] # !D1_q[5] & (ACC[13]));

--A1L68 is DB[1]~128
--operation mode is normal

A1L68 = D1_q[4] & (D1_q[5]) # !D1_q[4] & (D1_q[5] & ACC[5] # !D1_q[5] & (ACC[13]));


--A1L67 is DB[1]~121
--operation mode is normal

A1L67 = D1_q[4] & (A1L66 & (ACC[1]) # !A1L66 & ACC[9]) # !D1_q[4] & (A1L66);

--A1L69 is DB[1]~129
--operation mode is normal

A1L69 = D1_q[4] & (A1L66 & (ACC[1]) # !A1L66 & ACC[9]) # !D1_q[4] & (A1L66);


--A1L74 is DB[3]~122
--operation mode is normal

A1L74 = D1_q[4] & (D1_q[5]) # !D1_q[4] & (D1_q[5] & ACC[7] # !D1_q[5] & (ACC[15]));

--A1L76 is DB[3]~130
--operation mode is normal

A1L76 = D1_q[4] & (D1_q[5]) # !D1_q[4] & (D1_q[5] & ACC[7] # !D1_q[5] & (ACC[15]));


--A1L75 is DB[3]~123
--operation mode is normal

A1L75 = D1_q[4] & (A1L74 & (ACC[3]) # !A1L74 & ACC[11]) # !D1_q[4] & (A1L74);

--A1L77 is DB[3]~131
--operation mode is normal

A1L77 = D1_q[4] & (A1L74 & (ACC[3]) # !A1L74 & ACC[11]) # !D1_q[4] & (A1L74);


--A1L70 is DB[2]~124
--operation mode is normal

A1L70 = D1_q[5] & (D1_q[4]) # !D1_q[5] & (D1_q[4] & ACC[10] # !D1_q[4] & (ACC[14]));

--A1L72 is DB[2]~132
--operation mode is normal

A1L72 = D1_q[5] & (D1_q[4]) # !D1_q[5] & (D1_q[4] & ACC[10] # !D1_q[4] & (ACC[14]));


--A1L71 is DB[2]~125
--operation mode is normal

A1L71 = D1_q[5] & (A1L70 & (ACC[2]) # !A1L70 & ACC[6]) # !D1_q[5] & (A1L70);

--A1L73 is DB[2]~133
--operation mode is normal

A1L73 = D1_q[5] & (A1L70 & (ACC[2]) # !A1L70 & ACC[6]) # !D1_q[5] & (A1L70);


--A1L62 is DB[0]~126
--operation mode is normal

A1L62 = D1_q[4] & (D1_q[5]) # !D1_q[4] & (D1_q[5] & ACC[4] # !D1_q[5] & (ACC[12]));

--A1L64 is DB[0]~134
--operation mode is normal

A1L64 = D1_q[4] & (D1_q[5]) # !D1_q[4] & (D1_q[5] & ACC[4] # !D1_q[5] & (ACC[12]));


--A1L63 is DB[0]~127
--operation mode is normal

A1L63 = D1_q[4] & (A1L62 & (ACC[0]) # !A1L62 & ACC[8]) # !D1_q[4] & (A1L62);

--A1L65 is DB[0]~135
--operation mode is normal

A1L65 = D1_q[4] & (A1L62 & (ACC[0]) # !A1L62 & ACC[8]) # !D1_q[4] & (A1L62);