m3s009ct.v
来自「这是16位定点dsp源代码。已仿真和综合过了」· Verilog 代码 · 共 74 行
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//******************************************************************* ////IMPORTANT NOTICE ////================ ////Copyright Mentor Graphics Corporation 1996 - 1998. All rights reserved. ////This file and associated deliverables are the trade secrets, ////confidential information and copyrighted works of Mentor Graphics ////Corporation and its licensors and are subject to your license agreement ////with Mentor Graphics Corporation. //// ////These deliverables may be used for the purpose of making silicon for one ////IC design only. No further use of these deliverables for the purpose of ////making silicon from an IC design is permitted without the payment of an ////additional license fee. See your license agreement with Mentor Graphics ////for further details. If you have further questions please contact ////Mentor Graphics Customer Support. //// ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on ////workstation hostid 800059c1 Inventra //// Tri-state Buffers// Copyright Mentor Graphics Corporation and Licensors 1998.// V1.01// Revision history// V1.01 - 29 June 1997// Number of tri-state drivers reduced// V1.0 - 17 May 1996// m3s009ct// M320C50 Program address generator tri-state buffers// Tri-state buffers put in a separate module to avoid poosible synthesis// problems.module m3s009ct (DFC, StackOut, NextBMAR, BMAR,//******************************************************************* ////IMPORTANT NOTICE ////================ ////Copyright Mentor Graphics Corporation 1996 - 1998. All rights reserved. ////This file and associated deliverables are the trade secrets, ////confidential information and copyrighted works of Mentor Graphics ////Corporation and its licensors and are subject to your license agreement ////with Mentor Graphics Corporation. //// ////These deliverables may be used for the purpose of making silicon for one ////IC design only. No further use of these deliverables for the purpose of ////making silicon from an IC design is permitted without the payment of an ////additional license fee. See your license agreement with Mentor Graphics ////for further details. If you have further questions please contact ////Mentor Graphics Customer Support. //// ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on ////workstation hostid 800059c1 Inventra // DFCProgEnab, StackDataEnab, StackWriteEnab, BMARReadEnab, BMARProgEnab, ProgBus, DataBus, DataWrite, DataRead); input [15:0] DFC, StackOut, NextBMAR, BMAR; input DFCProgEnab, StackDataEnab, StackWriteEnab; input BMARReadEnab, BMARProgEnab; output [15:0] ProgBus, DataBus, DataWrite, DataRead; tri [15:0] ProgBus, DataBus, DataWrite, DataRead; reg [15:0] ProgBusOp;// ProgBus output multiplexeralways @(DFCProgEnab or DFC or BMAR) if (DFCProgEnab) ProgBusOp = DFC; else ProgBusOp = BMAR;assign ProgBus = (DFCProgEnab | BMARProgEnab) ? ProgBusOp : 16'bZ;assign DataBus = StackDataEnab ? StackOut : 16'bZ;assign DataWrite = StackWriteEnab ? StackOut : 16'bZ;assign DataRead = BMARReadEnab ? NextBMAR : 16'bZ;endmodule⌨️ 快捷键说明
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