m3s056ct.v

来自「这是16位定点dsp源代码。已仿真和综合过了」· Verilog 代码 · 共 66 行

//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //
// Carry Generator
// Copyright Mentor Graphics Corporation and Licensors 1998.
// V1.0

// m3s056ct
// M320C50 Auxillary register arithmetic unit carry generator.


module m3s056ct (CarryIn, Carry_Prop, Carry_Gen,
//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //
     CarryOut1, CarryOut2, CarryOut3, CarryOut4);
    input       CarryIn;
    input [3:0] Carry_Prop, Carry_Gen;
    output      CarryOut1, CarryOut2, CarryOut3, CarryOut4;

    reg      CarryOut1, CarryOut2;
    wire     CarryOut3, CarryOut4;


always @(CarryIn or Carry_Prop or Carry_Gen)
begin
    CarryOut1 = Carry_Gen[0] | (CarryIn & Carry_Prop[0]);
    CarryOut2 = Carry_Gen[1] | (Carry_Gen[0] & Carry_Prop[1]) |
               (CarryIn & Carry_Prop[0] & Carry_Prop[1]);
end

m3s084ct U1 (CarryIn, Carry_Gen[2:0], Carry_Prop[2:0], CarryOut3);
m3s085ct U2 (CarryIn, Carry_Gen, Carry_Prop, CarryOut4);

endmodule