m3s031ct.v

来自「这是16位定点dsp源代码。已仿真和综合过了」· Verilog 代码 · 共 69 行

69 行

//*******************************************************************       ////IMPORTANT NOTICE                                                          ////================                                                          ////Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  ////This file and associated deliverables are the trade secrets,              ////confidential information and copyrighted works of Mentor Graphics         ////Corporation and its licensors and are subject to your license agreement   ////with Mentor Graphics Corporation.                                         ////                                                                          ////These deliverables may be used for the purpose of making silicon for one  ////IC design only.  No further use of these deliverables for the purpose of  ////making silicon from an IC design is permitted without the payment of an   ////additional license fee.  See your license agreement with Mentor Graphics  ////for further details.  If you have further questions please contact        ////Mentor Graphics Customer Support.                                         ////                                                                          ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on         ////workstation hostid 800059c1 Inventra                                      //// TDM Transmitter Address// Copyright Mentor Graphics Corporation and Licensors 1998.// V1.002// m3s031ct// M320C50 TDM port transmitter address// Generates TADD signalmodule m3s031ct (TxClock, TxCount, TxAddr, TADD);//*******************************************************************       ////IMPORTANT NOTICE                                                          ////================                                                          ////Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  ////This file and associated deliverables are the trade secrets,              ////confidential information and copyrighted works of Mentor Graphics         ////Corporation and its licensors and are subject to your license agreement   ////with Mentor Graphics Corporation.                                         ////                                                                          ////These deliverables may be used for the purpose of making silicon for one  ////IC design only.  No further use of these deliverables for the purpose of  ////making silicon from an IC design is permitted without the payment of an   ////additional license fee.  See your license agreement with Mentor Graphics  ////for further details.  If you have further questions please contact        ////Mentor Graphics Customer Support.                                         ////                                                                          ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on         ////workstation hostid 800059c1 Inventra                                      //  input        TxClock;  input  [7:0] TxAddr;  input  [3:0] TxCount;  output       TADD;    reg [7:0] TxAddrSR;  reg       TADD;// Tx address shift registeralways @(posedge TxClock)begin    if (TxCount == 15) TxAddrSR <= TxAddr;    else TxAddrSR <= {1'b1,TxAddrSR[7:1]};// Tx address sync    TADD <= TxAddrSR[0];endendmodule

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