📄 keypadscan.mfd
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row<0>.CE = column<7> * column<6> * column<5> * column<4> *
column<3> * column<2> * column<1> * column<0>;
GLOBALS | 1 | 2 | clk
MACROCELL | 0 | 7 | row<7>_MC
ATTRIBUTES | 2156168002 | 0
OUTPUTMC | 6 | 0 | 0 | 1 | 15 | 0 | 13 | 0 | 14 | 1 | 14 | 1 | 13
INPUTS | 9 | row<6> | column<7> | column<6> | column<5> | column<4> | column<3> | column<2> | column<1> | column<0>
INPUTMC | 1 | 0 | 6
INPUTP | 8 | 12 | 30 | 31 | 32 | 33 | 34 | 38 | 39
EQ | 4 |
row<7> := row<6>;
row<7>.CLK = clk; // GCK
row<7>.CE = column<7> * column<6> * column<5> * column<4> *
column<3> * column<2> * column<1> * column<0>;
GLOBALS | 1 | 2 | clk
MACROCELL | 0 | 6 | row<6>_MC
ATTRIBUTES | 2156168006 | 0
OUTPUTMC | 6 | 0 | 7 | 1 | 15 | 0 | 13 | 0 | 14 | 1 | 14 | 1 | 13
INPUTS | 9 | row<5> | column<7> | column<6> | column<5> | column<4> | column<3> | column<2> | column<1> | column<0>
INPUTMC | 1 | 0 | 5
INPUTP | 8 | 12 | 30 | 31 | 32 | 33 | 34 | 38 | 39
EQ | 4 |
row<6> := row<5>;
row<6>.CLK = clk; // GCK
row<6>.CE = column<7> * column<6> * column<5> * column<4> *
column<3> * column<2> * column<1> * column<0>;
GLOBALS | 1 | 2 | clk
MACROCELL | 0 | 5 | row<5>_MC
ATTRIBUTES | 2156168006 | 0
OUTPUTMC | 6 | 0 | 6 | 1 | 15 | 0 | 13 | 0 | 14 | 1 | 14 | 1 | 13
INPUTS | 9 | row<4> | column<7> | column<6> | column<5> | column<4> | column<3> | column<2> | column<1> | column<0>
INPUTMC | 1 | 0 | 4
INPUTP | 8 | 12 | 30 | 31 | 32 | 33 | 34 | 38 | 39
EQ | 4 |
row<5> := row<4>;
row<5>.CLK = clk; // GCK
row<5>.CE = column<7> * column<6> * column<5> * column<4> *
column<3> * column<2> * column<1> * column<0>;
GLOBALS | 1 | 2 | clk
MACROCELL | 0 | 4 | row<4>_MC
ATTRIBUTES | 2156168006 | 0
OUTPUTMC | 6 | 0 | 5 | 1 | 15 | 0 | 13 | 0 | 14 | 1 | 14 | 1 | 13
INPUTS | 9 | row<3> | column<7> | column<6> | column<5> | column<4> | column<3> | column<2> | column<1> | column<0>
INPUTMC | 1 | 0 | 3
INPUTP | 8 | 12 | 30 | 31 | 32 | 33 | 34 | 38 | 39
EQ | 4 |
row<4> := row<3>;
row<4>.CLK = clk; // GCK
row<4>.CE = column<7> * column<6> * column<5> * column<4> *
column<3> * column<2> * column<1> * column<0>;
GLOBALS | 1 | 2 | clk
MACROCELL | 0 | 3 | row<3>_MC
ATTRIBUTES | 2156168006 | 0
OUTPUTMC | 6 | 0 | 4 | 1 | 15 | 0 | 13 | 0 | 14 | 1 | 14 | 1 | 13
INPUTS | 9 | row<2> | column<7> | column<6> | column<5> | column<4> | column<3> | column<2> | column<1> | column<0>
INPUTMC | 1 | 0 | 2
INPUTP | 8 | 12 | 30 | 31 | 32 | 33 | 34 | 38 | 39
EQ | 4 |
row<3> := row<2>;
row<3>.CLK = clk; // GCK
row<3>.CE = column<7> * column<6> * column<5> * column<4> *
column<3> * column<2> * column<1> * column<0>;
GLOBALS | 1 | 2 | clk
MACROCELL | 0 | 13 | _n009837_MC
ATTRIBUTES | 536871680 | 0
INPUTS | 8 | row<2> | row<3> | row<4> | row<5> | row<6> | row<7> | row<0> | row<1>
INPUTMC | 8 | 0 | 2 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1
EQ | 14 |
_n009837 = row<2> * row<3> * row<4> * row<5> * row<6> *
row<7> * row<0> * !row<1>
# row<2> * row<3> * row<4> * row<5> * row<6> *
row<7> * !row<0> * row<1>
# row<2> * row<3> * row<4> * row<5> * row<6> *
!row<7> * row<0> * row<1>
# row<2> * row<3> * row<4> * !row<5> * row<6> *
row<7> * row<0> * row<1>
# row<2> * row<3> * !row<4> * row<5> * row<6> *
row<7> * row<0> * row<1>
# row<2> * !row<3> * row<4> * row<5> * row<6> *
row<7> * row<0> * row<1>
# !row<2> * row<3> * row<4> * row<5> * row<6> *
row<7> * row<0> * row<1>;
MACROCELL | 0 | 14 | N_PZ_98_MC
ATTRIBUTES | 536871680 | 0
OUTPUTMC | 2 | 1 | 14 | 1 | 13
INPUTS | 8 | row<2> | row<3> | row<4> | row<5> | row<6> | row<7> | row<0> | row<1>
INPUTMC | 8 | 0 | 2 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1
EQ | 2 |
N_PZ_98 = row<2> * row<3> * row<4> * row<5> * !row<6> *
row<7> * row<0> * row<1>;
MACROCELL | 1 | 3 | out<4>_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 9 | outreg<4> | column<7> | column<6> | column<5> | column<4> | column<3> | column<2> | column<1> | column<0>
INPUTMC | 1 | 1 | 14
INPUTP | 8 | 12 | 30 | 31 | 32 | 33 | 34 | 38 | 39
EQ | 3 |
out<4> = outreg<4>
# column<7> * column<6> * column<5> * column<4> *
column<3> * column<2> * column<1> * column<0>;
MACROCELL | 1 | 14 | outreg<4>_MC
ATTRIBUTES | 2282226432 | 0
OUTPUTMC | 1 | 1 | 3
INPUTS | 9 | N_PZ_98 | row<2> | row<3> | row<4> | row<5> | row<6> | row<7> | row<0> | row<1>
INPUTMC | 9 | 0 | 14 | 0 | 2 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1
LCT | 1 | 2 | Internal_Name
EQ | 8 |
outreg<4>.D = N_PZ_98
# row<2> * row<3> * row<4> * row<5> * row<6> *
!row<7> * row<0> * row<1>
# row<2> * !row<3> * row<4> * row<5> * row<6> *
row<7> * row<0> * row<1>
# !row<2> * row<3> * row<4> * row<5> * row<6> *
row<7> * row<0> * row<1>;
outreg<4>.LH = !(!_n009837 * !N_PZ_98);
MACROCELL | 1 | 5 | out<5>_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 9 | outreg<5> | column<7> | column<6> | column<5> | column<4> | column<3> | column<2> | column<1> | column<0>
INPUTMC | 1 | 1 | 13
INPUTP | 8 | 12 | 30 | 31 | 32 | 33 | 34 | 38 | 39
EQ | 3 |
out<5> = outreg<5>
# column<7> * column<6> * column<5> * column<4> *
column<3> * column<2> * column<1> * column<0>;
MACROCELL | 1 | 13 | outreg<5>_MC
ATTRIBUTES | 2282226432 | 0
OUTPUTMC | 1 | 1 | 5
INPUTS | 9 | N_PZ_98 | row<2> | row<3> | row<4> | row<5> | row<6> | row<7> | row<0> | row<1>
INPUTMC | 9 | 0 | 14 | 0 | 2 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1
LCT | 1 | 2 | Internal_Name
EQ | 8 |
outreg<5>.D = N_PZ_98
# row<2> * row<3> * row<4> * row<5> * row<6> *
!row<7> * row<0> * row<1>
# row<2> * row<3> * row<4> * !row<5> * row<6> *
row<7> * row<0> * row<1>
# row<2> * row<3> * !row<4> * row<5> * row<6> *
row<7> * row<0> * row<1>;
outreg<5>.LH = !(!_n009837 * !N_PZ_98);
PIN | clk | 4096 | 64 | LVCMOS18 | 10 | 8 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2
PIN | column<0> | 64 | 64 | LVCMOS18 | 39 | 19 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 8 | 0 | 10 | 1 | 0 | 0 | 9 | 1 | 1 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2 | 1 | 2 | 1 | 3 | 1 | 5
PIN | column<1> | 64 | 64 | LVCMOS18 | 38 | 19 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 8 | 0 | 10 | 1 | 0 | 0 | 9 | 1 | 1 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2 | 1 | 2 | 1 | 3 | 1 | 5
PIN | column<2> | 64 | 64 | LVCMOS18 | 34 | 19 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 8 | 0 | 10 | 1 | 0 | 0 | 9 | 1 | 1 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2 | 1 | 2 | 1 | 3 | 1 | 5
PIN | column<3> | 64 | 64 | LVCMOS18 | 33 | 19 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 8 | 0 | 10 | 1 | 0 | 0 | 9 | 1 | 1 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2 | 1 | 2 | 1 | 3 | 1 | 5
PIN | column<4> | 64 | 64 | LVCMOS18 | 32 | 19 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 8 | 0 | 10 | 1 | 0 | 0 | 9 | 1 | 1 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2 | 1 | 2 | 1 | 3 | 1 | 5
PIN | column<5> | 64 | 64 | LVCMOS18 | 31 | 19 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 8 | 0 | 10 | 1 | 0 | 0 | 9 | 1 | 1 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2 | 1 | 2 | 1 | 3 | 1 | 5
PIN | column<6> | 64 | 64 | LVCMOS18 | 30 | 19 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 8 | 0 | 10 | 1 | 0 | 0 | 9 | 1 | 1 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2 | 1 | 2 | 1 | 3 | 1 | 5
PIN | column<7> | 64 | 64 | LVCMOS18 | 12 | 19 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 8 | 0 | 10 | 1 | 0 | 0 | 9 | 1 | 1 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 6 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2 | 1 | 2 | 1 | 3 | 1 | 5
PIN | out<0> | 536871040 | 0 | LVCMOS18 | 40
PIN | out<1> | 536871040 | 0 | LVCMOS18 | 6
PIN | out<2> | 536871040 | 0 | LVCMOS18 | 7
PIN | out<3> | 536871040 | 0 | LVCMOS18 | 8
PIN | out<4> | 536871040 | 0 | LVCMOS18 | 9
PIN | out<5> | 536871040 | 0 | LVCMOS18 | 11
PIN | row<0> | 536871040 | 0 | LVCMOS18 | 5
PIN | row<1> | 536871040 | 0 | LVCMOS18 | 4
PIN | row<2> | 536871040 | 0 | LVCMOS18 | 3
PIN | row<3> | 536871040 | 0 | LVCMOS18 | 1
PIN | row<4> | 536871040 | 0 | LVCMOS18 | 44
PIN | row<5> | 536871040 | 0 | LVCMOS18 | 43
PIN | row<6> | 536871040 | 0 | LVCMOS18 | 42
PIN | row<7> | 536871040 | 0 | LVCMOS18 | 41
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