📄 keypadscan.rpt
字号:
cpldfit: version G.38 Xilinx Inc.
Fitter Report
Design Name: KeypadScan Date: 3- 4-2005, 1:07PM
Device Used: XC2C32A-6-CP56
Fitting Status: Successful
**************************** Resource Summary ****************************
Macrocells Product Terms Registers Pins Function Block
Used Used Used Used Inputs Used
24 /32 ( 75%) 49 /112 ( 44%) 14 /32 ( 44%) 23 /33 ( 70%) 42 /80 ( 52%)
PIN RESOURCES:
Signal Type Required Mapped | Pin Type Used Remaining
------------------------------------|---------------------------------------
Input : 8 8 | I/O : 15 9
Output : 14 14 | GCK/IO : 3 0
Bidirectional : 0 0 | GTS/IO : 4 0
GCK : 1 1 | GSR/IO : 1 0
GTS : 0 0 | CDR/IO : 0 0
GSR : 0 0 | DGE/IO : 0 0
---- ----
Total 23 23
MACROCELL RESOURCES:
Total Macrocells Available 32
Registered Macrocells 14
Non-registered Macrocell driving I/O 6
GLOBAL RESOURCES:
Signal 'clk' mapped onto global clock net GCK0.
Global output enable net(s) unused.
Global set/reset net(s) unused.
End of Resource Summary
*************** Summary of Required Resources ******************
** LOGIC **
Signal Total Signals Loc Slew Pin Pin Pin Reg I/O I/O Reg Init
Name Pt Used Rate # Type Use Use STD Style State
N_PZ_96 1 8 FB1_16 E8 I/O I
N_PZ_98 1 8 FB1_15 C10 I/O I
_n009837 7 8 FB1_14 B10 I/O I
_n010237 7 8 FB1_13 A10 I/O I
out<0> 2 9 FB1_9 FAST A1 I/O O LVCMOS18
out<1> 2 9 FB2_1 FAST G1 I/O O LVCMOS18
out<2> 2 9 FB2_2 FAST F3 I/O O LVCMOS18
out<3> 2 9 FB2_3 FAST H1 I/O O LVCMOS18
out<4> 2 9 FB2_4 FAST G3 I/O O LVCMOS18
out<5> 2 9 FB2_6 FAST K1 GCK/I/O O LVCMOS18
outreg<0> 5 10 FB1_12 C8 I/O I LATCH RESET
outreg<1> 5 10 FB1_11 C5 I/O I LATCH RESET
outreg<2> 5 10 FB1_10 C4 I/O I LATCH RESET
outreg<3> 5 10 FB2_16 F10 I/O (b) LATCH RESET
outreg<4> 5 10 FB2_15 G10 I/O (b) LATCH RESET
outreg<5> 5 10 FB2_14 H10 I/O (b) LATCH RESET
row<0> 2 9 FB1_1 FAST F1 I/O O DEFF/S LVCMOS18 SET
row<1> 2 9 FB1_2 FAST E3 I/O O DEFF/S LVCMOS18 SET
row<2> 2 9 FB1_3 FAST E1 I/O O DEFF/S LVCMOS18 SET
row<3> 2 9 FB1_4 FAST D1 GTS/I/O O DEFF/S LVCMOS18 SET
row<4> 2 9 FB1_5 FAST C1 GTS/I/O O DEFF/S LVCMOS18 SET
row<5> 2 9 FB1_6 FAST A3 GTS/I/O O DEFF/S LVCMOS18 SET
row<6> 2 9 FB1_7 FAST A2 GTS/I/O O DEFF/S LVCMOS18 SET
row<7> 2 9 FB1_8 FAST B1 GSR/I/O O DEFF LVCMOS18 RESET
** INPUTS **
Signal Loc Pin Pin Pin Reg I/O I/O
Name # Type Use Use STD Style
clk FB2_5 J1 GCK/I/O GCK LVCMOS18 PU
column<0> FB1_10 C4 I/O I LVCMOS18 PU
column<1> FB1_11 C5 I/O I LVCMOS18 PU
column<2> FB1_12 C8 I/O I LVCMOS18 PU
column<3> FB1_13 A10 I/O I LVCMOS18 PU
column<4> FB1_14 B10 I/O I LVCMOS18 PU
column<5> FB1_15 C10 I/O I LVCMOS18 PU
column<6> FB1_16 E8 I/O I LVCMOS18 PU
column<7> FB2_7 K2 GCK/I/O I LVCMOS18 PU
End of Resources
Legend:
I/O Style - OD - OpenDrain
- PU - Pullup
- KPR - Keeper
- S - SchmittTrigger
- DG - DataGate
Reg Use - LATCH - Transparent latch
- DFF - D-flip-flop
- DEFF - D-flip-flop with clock enable
- TFF - T-flip-flop
- TDFF - Dual-edge-triggered T-flip-flop
- DDFF - Dual-edge-triggered flip-flop
- DDEFF - Dual-edge-triggered flip-flop with clock enable
/S (after any above flop/latch type) indicates initial state is Set
*********************Function Block Resource Summary***********************
Function # of FB Inputs Signals Total O/IO IO
Block Macrocells Used Used Pt Used Req Avail
FB1 16 19 19 35 9/0 16
FB2 8 23 23 14 5/0 16
---- ----- ----- -----
24 49 14/0 32
*********************************** FB1 ***********************************
This function block is part of I/O Bank number: 2
Number of signals used by logic mapping into function block: 19
Number of function block inputs used/remaining: 19/21
Number of function block control terms used/remaining: 1/3
Number of PLA product terms used/remaining: 35/21
Signal Total Loc Pin Pin Pin
Name Pt # Type Use
row<0> 2 FB1_1 F1 I/O O
row<1> 2 FB1_2 E3 I/O O
row<2> 2 FB1_3 E1 I/O O
row<3> 2 FB1_4 D1 GTS/I/O O
row<4> 2 FB1_5 C1 GTS/I/O O
row<5> 2 FB1_6 A3 GTS/I/O O
row<6> 2 FB1_7 A2 GTS/I/O O
row<7> 2 FB1_8 B1 GSR/I/O O
out<0> 2 FB1_9 A1 I/O O
outreg<2> 5 FB1_10 C4 I/O I
outreg<1> 5 FB1_11 C5 I/O I
outreg<0> 5 FB1_12 C8 I/O I
_n010237 7 FB1_13 A10 I/O I
_n009837 7 FB1_14 B10 I/O I
N_PZ_98 1 FB1_15 C10 I/O I
N_PZ_96 1 FB1_16 E8 I/O I
Signals Used by Logic in Function Block
1: N_PZ_96 8: column<5> 14: row<2>
2: _n010237 9: column<6> 15: row<3>
3: column<0> 10: column<7> 16: row<4>
4: column<1> 11: outreg<0> 17: row<5>
5: column<2> 12: row<0> 18: row<6>
6: column<3> 13: row<1> 19: row<7>
7: column<4>
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
row<0> ..XXXXXXXX........X..................... 9 9
row<1> ..XXXXXXXX.X............................ 9 9
row<2> ..XXXXXXXX..X........................... 9 9
row<3> ..XXXXXXXX...X.......................... 9 9
row<4> ..XXXXXXXX....X......................... 9 9
row<5> ..XXXXXXXX.....X........................ 9 9
row<6> ..XXXXXXXX......X....................... 9 9
row<7> ..XXXXXXXX.......X...................... 9 9
out<0> ..XXXXXXXXX............................. 9 9
outreg<2> XXXXXXXXXX.............................. 10 10
outreg<1> XXXXXXXXXX.............................. 10 10
outreg<0> XXXXXXXXXX.............................. 10 10
_n010237 ..XXXXXXXX.............................. 8 8
_n009837 ...........XXXXXXXX..................... 8 8
N_PZ_98 ...........XXXXXXXX..................... 8 8
N_PZ_96 ..XXXXXXXX.............................. 8 8
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
*********************************** FB2 ***********************************
This function block is part of I/O Bank number: 1
Number of signals used by logic mapping into function block: 23
Number of function block inputs used/remaining: 23/17
Number of function block control terms used/remaining: 1/3
Number of PLA product terms used/remaining: 14/42
Signal Total Loc Pin Pin Pin
Name Pt # Type Use
out<1> 2 FB2_1 G1 I/O O
out<2> 2 FB2_2 F3 I/O O
out<3> 2 FB2_3 H1 I/O O
out<4> 2 FB2_4 G3 I/O O
(unused) 0 FB2_5 J1 GCK/I/O GCK
out<5> 2 FB2_6 K1 GCK/I/O O
(unused) 0 FB2_7 K2 GCK/I/O I
(unused) 0 FB2_8 K3 I/O
(unused) 0 FB2_9 H3 I/O
(unused) 0 FB2_10 K5 I/O
(unused) 0 FB2_11 H5 I/O
(unused) 0 FB2_12 H8 I/O
(unused) 0 FB2_13 K8 I/O
outreg<5> 5 FB2_14 H10 I/O (b)
outreg<4> 5 FB2_15 G10 I/O (b)
outreg<3> 5 FB2_16 F10 I/O (b)
Signals Used by Logic in Function Block
1: N_PZ_98 9: column<6> 17: row<1>
2: _n009837 10: column<7> 18: row<2>
3: column<0> 11: outreg<1> 19: row<3>
4: column<1> 12: outreg<2> 20: row<4>
5: column<2> 13: outreg<3> 21: row<5>
6: column<3> 14: outreg<4> 22: row<6>
7: column<4> 15: outreg<5> 23: row<7>
8: column<5> 16: row<0>
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
out<1> ..XXXXXXXXX............................. 9 9
out<2> ..XXXXXXXX.X............................ 9 9
out<3> ..XXXXXXXX..X........................... 9 9
out<4> ..XXXXXXXX...X.......................... 9 9
out<5> ..XXXXXXXX....X......................... 9 9
outreg<5> XX.............XXXXXXXX................. 10 10
outreg<4> XX.............XXXXXXXX................. 10 10
outreg<3> XX.............XXXXXXXX................. 10 10
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
;;-----------------------------------------------------------------;;
; Implemented Equations.
assign out[0] = ((outreg[0])
|| (column[7] && column[6] && column[5] && column[4] &&
column[3] && column[2] && column[1] && column[0]));
LDCP LDCP_outreg0 (outreg[0],outreg_D[0],!,1'b0,1'b0);
assign outreg_D[0] = ((column[7] && column[6] && column[5] && column[4] &&
column[3] && column[2] && !column[1] && column[0])
|| (column[7] && column[6] && column[5] && column[4] &&
!column[3] && column[2] && column[1] && column[0])
|| (column[7] && column[6] && !column[5] && column[4] &&
column[3] && column[2] && column[1] && column[0])
|| (!column[7] && column[6] && column[5] && column[4] &&
column[3] && column[2] && column[1] && column[0]));
assign _n010237 = ((column[7] && column[6] && column[5] && column[4] &&
column[3] && column[2] && column[1] && !column[0])
|| (column[7] && column[6] && column[5] && column[4] &&
column[3] && column[2] && !column[1] && column[0])
|| (column[7] && column[6] && column[5] && column[4] &&
column[3] && !column[2] && column[1] && column[0])
|| (column[7] && column[6] && column[5] && column[4] &&
!column[3] && column[2] && column[1] && column[0])
|| (column[7] && column[6] && column[5] && !column[4] &&
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -