class.ptf

altera的ip核

         HDL_PARAMETER ref_clk
         {
            parameter_name = "REF_CLK";
            type = "integer";
            default_value = "18432000";
            editable = "1";
            tooltip = "";
         }
         HDL_PARAMETER sample_rate
         {
            parameter_name = "SAMPLE_RATE";
            type = "integer";
            default_value = "48000";
            editable = "1";
            tooltip = "";
         }
         HDL_PARAMETER data_width
         {
            parameter_name = "DATA_WIDTH";
            type = "integer";
            default_value = "16";
            editable = "1";
            tooltip = "";
         }
         HDL_PARAMETER channel_num
         {
            parameter_name = "CHANNEL_NUM";
            type = "integer";
            default_value = "2";
            editable = "1";
            tooltip = "";
         }
      }
      SW_FILES 
      {
      }
      built_on = "2006.07.19.02:21:47";
      CACHED_HDL_INFO 
      {
         # cached hdl info, emitted by CBFrameRealtime.getDocumentCachedHDLInfoSection
         # used only by Component Builder
         FILE FIFO_16_256.v
         {
            file_mod = "Wed Jul 19 01:52:44 CST 2006";
            quartus_map_start = "Wed Jul 19 02:13:24 CST 2006";
            quartus_map_finished = "Wed Jul 19 02:13:27 CST 2006";
            #found 1 valid modules
            WRAPPER FIFO_16_256
            {
               CLASS FIFO_16_256
               {
                  CB_GENERATOR 
                  {
                     HDL_FILES 
                     {
                        FILE 
                        {
                           use_in_simulation = "1";
                           use_in_synthesis = "1";
                           type = "";
                           filepath = "C:/DE2/DE2_NIOS_NET/Audio_DAC_FIFO/hdl/FIFO_16_256.v";
                        }
                     }
                     top_module_name = "FIFO_16_256";
                     emit_system_h = "0";
                  }
                  MODULE_DEFAULTS global_signals
                  {
                     class = "FIFO_16_256";
                     class_version = "1.0";
                     SYSTEM_BUILDER_INFO 
                     {
                        Instantiate_In_System_Module = "1";
                     }
                     SLAVE avalon_slave_0
                     {
                        SYSTEM_BUILDER_INFO 
                        {
                           Bus_Type = "avalon";
                        }
                        PORT_WIRING 
                        {
                           PORT aclr
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT data
                           {
                              width = "16";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT rdclk
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT rdreq
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wrclk
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wrreq
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT q
                           {
                              width = "16";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wrfull
                           {
                              width = "1";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                        }
                     }
                  }
                  USER_INTERFACE 
                  {
                     USER_LABELS 
                     {
                        name = "FIFO_16_256";
                        technology = "imported components";
                     }
                  }
                  SOPC_Builder_Version = "0.0";
               }
            }
         }
         FILE AUDIO_DAC_FIFO.v
         {
            file_mod = "Wed Jul 19 02:19:40 CST 2006";
            quartus_map_start = "Wed Jul 19 02:19:56 CST 2006";
            quartus_map_finished = "Wed Jul 19 02:19:59 CST 2006";
            #found 1 valid modules
            WRAPPER AUDIO_DAC_FIFO
            {
               CLASS AUDIO_DAC_FIFO
               {
                  CB_GENERATOR 
                  {
                     HDL_FILES 
                     {
                        FILE 
                        {
                           use_in_simulation = "1";
                           use_in_synthesis = "1";
                           type = "";
                           filepath = "C:/DE2/DE2_NIOS_NET/Audio_DAC_FIFO/hdl/AUDIO_DAC_FIFO.v";
                        }
                     }
                     top_module_name = "AUDIO_DAC_FIFO";
                     emit_system_h = "0";
                  }
                  MODULE_DEFAULTS global_signals
                  {
                     class = "AUDIO_DAC_FIFO";
                     class_version = "1.0";
                     SYSTEM_BUILDER_INFO 
                     {
                        Instantiate_In_System_Module = "1";
                     }
                     SLAVE avalon_slave_0
                     {
                        SYSTEM_BUILDER_INFO 
                        {
                           Bus_Type = "avalon";
                        }
                        PORT_WIRING 
                        {
                           PORT iDATA
                           {
                              width = "-1";
                              width_expression = "((DATA_WIDTH - 1)) - (0) + 1";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT iWR
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT iWR_CLK
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "clk";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT oDATA
                           {
                              width = "-1";
                              width_expression = "((DATA_WIDTH - 1)) - (0) + 1";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT oAUD_DATA
                           {
                              width = "1";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT oAUD_LRCK
                           {
                              width = "1";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT oAUD_BCK
                           {
                              width = "1";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT oAUD_XCK
                           {
                              width = "1";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT iCLK_18_4
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT iRST_N
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                        }
                     }
                  }
                  USER_INTERFACE 
                  {
                     USER_LABELS 
                     {
                        name = "AUDIO_DAC_FIFO";
                        technology = "imported components";
                     }
                  }
                  SOPC_Builder_Version = "0.0";
                  COMPONENT_BUILDER 
                  {
                     HDL_PARAMETERS 
                     {
                        # generated by CBDocument.getParameterContainer
                        # used only by Component Editor
                        HDL_PARAMETER ref_clk
                        {
                           parameter_name = "REF_CLK";
                           type = "integer";
                           default_value = "18432000";
                           editable = "1";
                           tooltip = "";
                        }
                        HDL_PARAMETER sample_rate
                        {
                           parameter_name = "SAMPLE_RATE";
                           type = "integer";
                           default_value = "48000";
                           editable = "1";
                           tooltip = "";
                        }
                        HDL_PARAMETER data_width
                        {
                           parameter_name = "DATA_WIDTH";
                           type = "integer";
                           default_value = "16";
                           editable = "1";
                           tooltip = "";
                        }
                        HDL_PARAMETER channel_num
                        {
                           parameter_name = "CHANNEL_NUM";
                           type = "integer";
                           default_value = "2";
                           editable = "1";
                           tooltip = "";
                        }
                     }
                  }
               }
            }
         }
      }
   }
   ASSOCIATED_FILES 
   {
      Add_Program = "the_wizard_ui";
      Edit_Program = "the_wizard_ui";
      Generator_Program = "cb_generator.pl";
   }
}