top_fmdm_project.mrp

ISE7.1

Release 7.1.04i Map H.42
Xilinx Mapping Report File for Design 'top_fmdm_project'

Design Information
------------------
Command Line   : D:/Xilinx/bin/nt/map.exe -ise f:\vhdlproject\vhdl0716\0716.ise
-intstyle ise -p xc2v500-fg456-4 -cm area -pr b -k 4 -c 100 -tx off -o
top_fmdm_project_map.ncd top_fmdm_project.ngd top_fmdm_project.pcf 
Target Device  : xc2v500
Target Package : fg456
Target Speed   : -4
Mapper Version : virtex2 -- $Revision: 1.26.6.4 $
Mapped Date    : Tue Jul 24 10:27:03 2007

Design Summary
--------------
Number of errors:      0
Number of warnings:    2
Logic Utilization:
  Total Number Slice Registers:       829 out of   6,144   13%
    Number used as Flip Flops:                   821
    Number used as Latches:                        8
  Number of 4 input LUTs:             699 out of   6,144   11%
Logic Distribution:
  Number of occupied Slices:          771 out of   3,072   25%
  Number of Slices containing only related logic:     771 out of     771  100%
  Number of Slices containing unrelated logic:          0 out of     771    0%
        *See NOTES below for an explanation of the effects of unrelated logic
Total Number 4 input LUTs:          1,090 out of   6,144   17%
  Number used as logic:               699
  Number used as a route-thru:        244
  Number used as Shift registers:     147

  Number of bonded IOBs:               74 out of     264   28%
    IOB Flip Flops:                    56
  Number of Block RAMs:                21 out of      32   65%
  Number of GCLKs:                      4 out of      16   25%
  Number of BSCANs:                     1 out of       1  100%

   Number of RPM macros:           12
Total equivalent gate count for design:  1,399,113
Additional JTAG gate count for IOBs:  3,552
Peak Memory Usage:  128 MB

NOTES:

   Related logic is defined as being logic that shares connectivity - e.g. two
   LUTs are "related" if they share common inputs.  When assembling slices,
   Map gives priority to combine logic that is related.  Doing so results in
   the best timing performance.

   Unrelated logic shares no connectivity.  Map will only begin packing
   unrelated logic into a slice once 99% of the slices are occupied through
   related logic packing.

   Note that once logic distribution reaches the 99% level through related
   logic packing, this does not mean the device is completely utilized.
   Unrelated logic packing will then begin, continuing until all usable LUTs
   and FFs are occupied.  Depending on your timing budget, increased levels of
   unrelated logic packing may adversely affect the overall timing performance
   of your design.

Table of Contents
-----------------
Section 1 - Errors
Section 2 - Warnings
Section 3 - Informational
Section 4 - Removed Logic Summary
Section 5 - Removed Logic
Section 6 - IOB Properties
Section 7 - RPMs
Section 8 - Guide Report
Section 9 - Area Group Summary
Section 10 - Modular Design Summary
Section 11 - Timing Report
Section 12 - Configuration String Information
Section 13 - Additional Device Resource Counts

Section 1 - Errors
------------------

Section 2 - Warnings
--------------------
WARNING:LIT:243 - Logical network icon_control0<10> has no load.
WARNING:LIT:374 - The above warning message base_net_load_rule is repeated 25
   more times for the following (max. 5 shown):
   icon_control0<11>,
   icon_control0<15>,
   icon_control0<16>,
   icon_control0<17>,
   icon_control0<18>
   To see the details of these warning messages, please use the -detail switch.

Section 3 - Informational
-------------------------
INFO:MapLib:562 - No environment variables are currently set.
INFO:MapLib:535 - The following Virtex BUFG(s) is/are being retargetted to
   Virtex2 BUFGMUX(s) with input tied to I0 and Select pin tied to constant 0:
   BUFG symbol "U_icon_pro/icon_pro/u_icon/i_yes_bscan/u_bs/i_bufg/u_bufg"
   (output signal=icon_control0<0>),
   BUFG symbol "buf_g" (output signal=adc1_clk_OBUF),
   BUFGP symbol "clk20mhz_BUFGP" (output signal=clk20mhz_BUFGP),
   BUFG symbol "uart/u_baud/baud_bclk_BUFG" (output
   signal=uart/u_baud/baud_bclk)
INFO:LIT:244 - All of the single ended outputs in this design are using slew
   rate limited output drivers. The delay on speed critical single ended outputs
   can be dramatically reduced by designating them as fast outputs in the
   schematic.

Section 4 - Removed Logic Summary
---------------------------------
  59 block(s) removed
 103 block(s) optimized away
  42 signal(s) removed

Section 5 - Removed Logic
-------------------------

The trimmed logic report below shows the logic removed from your design due to
sourceless or loadless signals, and VCC or ground connections.  If the removal
of a signal or symbol results in the subsequent removal of an additional signal
or symbol, the message explaining that second removal will be indented.  This
indentation will be repeated as a chain of related logic is removed.

To quickly locate the original cause for the removal of a chain of logic, look
above the place where that logic is listed in the trimming report, then locate
the lines that are least indented (begin at the leftmost edge).

Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/1/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/10/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/11/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/12/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/13/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/14/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/2/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/3/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/4/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/5/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/6/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/7/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/8/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/9/u_lut"
(ROM) removed.
Loadless block "U_ila_pro_0/ila_pro_0/i_yes_d/u_ila/u_stat/u_dsr" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_yes_d/u_ila/u_trig/u_tc/i_storage_qual/u_cap_b" (ROM)
removed.
Loadless block "fifo/BU124" (FF) removed.
Loadless block "fifo/BU147" (ROM) removed.
Loadless block "fifo/BU279" (FF) removed.
Loadless block "fifo/BU302" (ROM) removed.
The signal "icon_control0<10>" is sourceless and has been removed.
The signal "icon_control0<11>" is sourceless and has been removed.
The signal "icon_control0<15>" is sourceless and has been removed.
The signal "icon_control0<16>" is sourceless and has been removed.
The signal "icon_control0<17>" is sourceless and has been removed.
The signal "icon_control0<18>" is sourceless and has been removed.
The signal "icon_control0<21>" is sourceless and has been removed.
The signal "icon_control0<7>" is sourceless and has been removed.
The signal "icon_control0<22>" is sourceless and has been removed.
The signal "icon_control0<23>" is sourceless and has been removed.
The signal "icon_control0<24>" is sourceless and has been removed.
The signal "icon_control0<25>" is sourceless and has been removed.
The signal "icon_control0<26>" is sourceless and has been removed.
The signal "icon_control0<27>" is sourceless and has been removed.
The signal "icon_control0<30>" is sourceless and has been removed.
The signal "icon_control0<28>" is sourceless and has been removed.
The signal "icon_control0<31>" is sourceless and has been removed.
The signal "icon_control0<29>" is sourceless and has been removed.
The signal "icon_control0<32>" is sourceless and has been removed.
The signal "icon_control0<33>" is sourceless and has been removed.
The signal "icon_control0<34>" is sourceless and has been removed.
The signal "icon_control0<35>" is sourceless and has been removed.
The signal "fifo/ainit" is sourceless and has been removed.
The signal "fifo/N2066" is sourceless and has been removed.
 Sourceless block "fifo/BU117" (MUX) removed.
  The signal "fifo/BU117/O" is sourceless and has been removed.
   Sourceless block "fifo/BU117/MUXCY_L_BUF" (BUF) removed.
    The signal "fifo/BU117/LO" is sourceless and has been removed.
The signal "fifo/N2912" is sourceless and has been removed.
 Sourceless block "fifo/BU272" (MUX) removed.
  The signal "fifo/BU272/O" is sourceless and has been removed.
   Sourceless block "fifo/BU272/MUXCY_L_BUF" (BUF) removed.
    The signal "fifo/BU272/LO" is sourceless and has been removed.
The signal "fifo/BU112/O" is sourceless and has been removed.
 Sourceless block "fifo/BU112/MUXCY_L_BUF" (BUF) removed.
  The signal "fifo/BU112/LO" is sourceless and has been removed.
The signal "fifo/BU112/S" is sourceless and has been removed.
 Sourceless block "fifo/BU112" (MUX) removed.
The signal "fifo/BU267/O" is sourceless and has been removed.
 Sourceless block "fifo/BU267/MUXCY_L_BUF" (BUF) removed.
  The signal "fifo/BU267/LO" is sourceless and has been removed.
The signal "fifo/BU267/S" is sourceless and has been removed.
 Sourceless block "fifo/BU267" (MUX) removed.
The signal "U_icon_pro/u_icon/icommand_sel_12" is sourceless and has been
removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/3/u_lce"
(ROM) removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/3/u_hce"
(ROM) removed.
The signal "U_icon_pro/u_icon/icommand_sel_9" is sourceless and has been
removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/6/u_lce"
(ROM) removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/6/u_hce"
(ROM) removed.
The signal "U_icon_pro/u_icon/icommand_sel_8" is sourceless and has been
removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/7/u_lce"
(ROM) removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/7/u_hce"
(ROM) removed.
The signal "U_icon_pro/u_icon/icommand_sel_4" is sourceless and has been
removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/11/u_lce"
(ROM) removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/11/u_hce"
(ROM) removed.
The signal "U_icon_pro/u_icon/icommand_sel_3" is sourceless and has been
removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/12/u_lce"
(ROM) removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/12/u_hce"
(ROM) removed.
The signal "U_icon_pro/u_icon/icommand_sel_2" is sourceless and has been
removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/13/u_lce"
(ROM) removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/13/u_hce"
(ROM) removed.
The signal "U_icon_pro/u_icon/icommand_sel_1" is sourceless and has been
removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/14/u_lce"
(ROM) removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/0/f_cmd/14/u_hce"
(ROM) removed.
Unused block "U_icon_pro/icon_pro/u_icon/u_cmd/u_command_sel/i4/fi/11/u_lut"
(ROM) removed.