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📄 mux_log_wide_narrow.vhd

📁 ISE7.1
💻 VHD
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--------------------------------------------------------------------------------
-- Company: 
-- Engineer:
--
-- Create Date:    10:33:37 01/24/07
-- Design Name:    
-- Module Name:    mux_log_wide_narrow - Behavioral
-- Project Name:   
-- Target Device:  
-- Tool versions:  
-- Description:
--
-- Dependencies:
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
--------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity mux_log_wide_narrow is
port(
     baudclk            :in std_logic;
     reset              :in std_logic;
     mux_en             :in std_logic;-----mux的使能.由dataadjust进程产生。
	  comm_from_rs232    :in std_logic_vector(7 downto 0);-----RS232接收寄存器。
	  ready_rs232        :in std_logic;----------------------------RS232接收完毕标志。
     dataout_log        :in std_logic_vector(7 downto 0);-----来自鉴频器log输出的数据
	  dataout_widefreq   :in std_logic_vector(7 downto 0);---来自鉴频器宽带输出的数据
	  dataout_narrowfreq :in std_logic_vector(7 downto 0);---	来自鉴频器窄带输出的数据
	  dataout_mux        :out std_logic_vector(7 downto 0)---mux的输出
	  );
end mux_log_wide_narrow;

architecture Behavioral of mux_log_wide_narrow is
signal command:std_logic_vector(7 downto 0);

	begin
	--process(reset,select_clk)
	--begin
	--if(rising_edge(select_clk))then
	--  if(reset='0')then	
	--  dataout_mux<=dataout_log;
	--   if(mux_en='1' and ready_rs232='1')then
	--	  if	(comm_from_rs232(7)='1')then
	--	     case comm_from_rs232(6 downto 5) is
	--	      when "00"=>dataout_mux<=dataout_log;
	--	      when "01"=>dataout_mux<=dataout_widefreq;
	--	      when "10"=>dataout_mux<=dataout_narrowfreq;
	--	      when others=>dataout_mux<=dataout_log;
	--	     end case;
	--		end if;
	--   end if;
	--  end if;
	--end if;
	--
	--end process;
	--
	 process(reset,baudclk)
	 begin
	     if(reset='0')then
			 command<=(others=>'0');
	     elsif(rising_edge(baudclk))then
		     if ready_rs232='1' then
			     command<=comm_from_rs232;
			  end if;
	    end if;
	end process;


	process(command,mux_en,reset,dataout_log,dataout_widefreq,dataout_narrowfreq)
	begin
		if(reset='0')then
		  dataout_mux<=dataout_log;
		elsif(mux_en='1')then
		          case command(7 downto 5) is
			           when "000"=>dataout_mux<=dataout_log;
			           when "001"=>dataout_mux<=dataout_widefreq;
			           when "010"=>dataout_mux<=dataout_narrowfreq;
			           when others=>dataout_mux<=dataout_log;
			       end case;
		end if;
	end process;

	end Behavioral;

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