select_clk.vhd

来自「ISE7.1」· VHDL 代码 · 共 127 行

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-- Company: 
-- Engineer:
--
-- Create Date:    15:02:17 10/18/06
-- Design Name:    
-- Module Name:    select_clk - Behavioral
-- Project Name:   
-- Target Device:  
-- Tool versions:  
-- Description: 本进程同时完成ADC的clk选择，以及fifo输入的选择功能
--
-- Dependencies:
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity select_clk is
    Port ( baud_clk:in std_logic;--------------晶振时钟。修改为了baud时钟,原来为20mhz,由于ready信号宽度限制，最后删掉
	        delay_in :in std_logic_vector(20 downto 0);--总共有21条delay line
			  com_select_clk:in std_logic; ---recready信号做进程敏感信号。即此信号为高后，根据接收寄存器判断选择哪个clk
			  com_from_serial_receiverrbuf:in std_logic_vector(7 downto 0);----接收到recready后，根据rbuf判断选择哪个clk
			  reset:in std_logic;
           selected_delay_clk:out std_logic-----最终选择的时钟	
			  	 ) ;
end select_clk;

architecture Behavioral of select_clk is
  signal command:std_logic_vector(7 downto 0);

begin

-- process(com_select_clk,reset,delay_in)
-- begin
--     if(reset='0')then
--		 command<=(others=>'0');
--		 selected_delay_clk<='0';
--     elsif(rising_edge(com_select_clk))then
--		    command<=com_from_serial_receiverrbuf;
--			 if (command(7 downto 5)="000")then
--          case command(4 downto 0) is
--          when "00000"=>selected_delay_clk<=delay_in(0);------没有延迟
--          when "00001"=>selected_delay_clk<=delay_in(1);------延迟8ns
--          when "00010"=>selected_delay_clk<=delay_in(2);------延迟10ns
--          when "00011"=>selected_delay_clk<=delay_in(3);------延迟12ns
--          when "00100"=>selected_delay_clk<=delay_in(4);------延迟14ns
--          when "00101"=>selected_delay_clk<=delay_in(5);------延迟16ns
--          when "00110"=>selected_delay_clk<=delay_in(6);------延迟18ns
--          when "00111"=>selected_delay_clk<=delay_in(7);------延迟20ns
--          when "01000"=>selected_delay_clk<=delay_in(8);------延迟22ns
--          when "01001"=>selected_delay_clk<=delay_in(9);------延迟24ns
--          when "01010"=>selected_delay_clk<=delay_in(10);-----延迟26ns
--          when "01011"=>selected_delay_clk<=delay_in(11);-----延迟28ns
--          when "01100"=>selected_delay_clk<=delay_in(12);-----延迟30ns
--          when "01101"=>selected_delay_clk<=delay_in(13);-----延迟32ns
--          when "01110"=>selected_delay_clk<=delay_in(14);-----延迟34ns
--          when "01111"=>selected_delay_clk<=delay_in(15);-----延迟36ns
--          when "10000"=>selected_delay_clk<=delay_in(16);-----延迟38ns
--          when "10001"=>selected_delay_clk<=delay_in(17);-----延迟40ns
--          when "10010"=>selected_delay_clk<=delay_in(18);-----延迟42ns
--          when "10011"=>selected_delay_clk<=delay_in(19);-----延迟44ns
--          when "10100"=>selected_delay_clk<=delay_in(20);-----延迟46ns
--		    when others=>selected_delay_clk<=delay_in(2);-------延迟10ns
--          end case;
--		  end if;
--    end if;
--end process;


 process(reset,baud_clk)
 begin
     if(reset='0')then
		 command<=(others=>'0');
     elsif(rising_edge(baud_clk))then
	     if com_select_clk='1' then
		     command<=com_from_serial_receiverrbuf;
		  end if;
    end if;
end process;

 process(reset,command(4 downto 0),delay_in)
 begin
     if(reset='0')then
		 selected_delay_clk<='0';
     else
          case command(4 downto 0) is
	          when "00000"=>selected_delay_clk<=delay_in(0);------没有延迟
	          when "00001"=>selected_delay_clk<=delay_in(1);------延迟8ns
	          when "00010"=>selected_delay_clk<=delay_in(2);------延迟10ns
	          when "00011"=>selected_delay_clk<=delay_in(3);------延迟12ns
	          when "00100"=>selected_delay_clk<=delay_in(4);------延迟14ns
	          when "00101"=>selected_delay_clk<=delay_in(5);------延迟16ns
	          when "00110"=>selected_delay_clk<=delay_in(6);------延迟18ns
	          when "00111"=>selected_delay_clk<=delay_in(7);------延迟20ns
	          when "01000"=>selected_delay_clk<=delay_in(8);------延迟22ns
	          when "01001"=>selected_delay_clk<=delay_in(9);------延迟24ns
	          when "01010"=>selected_delay_clk<=delay_in(10);-----延迟26ns
	          when "01011"=>selected_delay_clk<=delay_in(11);-----延迟28ns
	          when "01100"=>selected_delay_clk<=delay_in(12);-----延迟30ns
	          when "01101"=>selected_delay_clk<=delay_in(13);-----延迟32ns
	          when "01110"=>selected_delay_clk<=delay_in(14);-----延迟34ns
	          when "01111"=>selected_delay_clk<=delay_in(15);-----延迟36ns
	          when "10000"=>selected_delay_clk<=delay_in(16);-----延迟38ns
	          when "10001"=>selected_delay_clk<=delay_in(17);-----延迟40ns
	          when "10010"=>selected_delay_clk<=delay_in(18);-----延迟42ns
	          when "10011"=>selected_delay_clk<=delay_in(19);-----延迟44ns
	          when "10100"=>selected_delay_clk<=delay_in(20);-----延迟46ns
			    when others =>selected_delay_clk<=delay_in(0);-------延迟10ns
          end case;
		  end if;
end process;


end Behavioral;