hdpdeps.ref

ISE7.1

V2 61
FL F:/vhdlproject/vhdl0716/top_fmdm_project.vhd 2007/07/23.21:53:48 H.42
EN work/TOP_FMDM_PROJECT 1185244012 FL F:/vhdlproject/vhdl0716/top_fmdm_project.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634 PH unisim/VCOMPONENTS 1122082370
AR work/TOP_FMDM_PROJECT/BEHAVIORAL 1185244013 \
      FL F:/vhdlproject/vhdl0716/top_fmdm_project.vhd EN work/TOP_FMDM_PROJECT 1185244012 \
      CP TOP_UART       CP SELECT_CLK     CP BUFG           CP ADC_CONTROL \
      CP ADD_ACCUMULATOR CP ACCUMULATOR_CTR_DATAADJUST CP DATAFORMAT_ADJUST_LOG \
      CP DATAFORMAT_ADJUST_NARROWFREQ CP DATAFORMAT_ADJUST_WIDEFREQ \
      CP MUX_LOG_WIDE_NARROW CP FIFO_RS232 CP READFIFO_RS232 \
      CP NARROW_WIDE_PULSE_GENERATE
FL F:/vhdlproject/vhdl0716/adc_control.vhd 2007/07/11.15:50:46 H.42
EN work/ADC_CONTROL 1185243994     FL F:/vhdlproject/vhdl0716/adc_control.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/ADC_CONTROL/BEHAVIORAL 1185243995 FL F:/vhdlproject/vhdl0716/adc_control.vhd \
      EN work/ADC_CONTROL 1185243994
FL F:/vhdlproject/vhdl0716/dataformat_adjust_widefreq.vhd 2007/07/11.16:03:04 H.42
EN work/DATAFORMAT_ADJUST_WIDEFREQ 1185244004 \
      FL F:/vhdlproject/vhdl0716/dataformat_adjust_widefreq.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/DATAFORMAT_ADJUST_WIDEFREQ/BEHAVIORAL 1185244005 \
      FL F:/vhdlproject/vhdl0716/dataformat_adjust_widefreq.vhd \
      EN work/DATAFORMAT_ADJUST_WIDEFREQ 1185244004
FL F:/vhdlproject/vhdl0716/transfer.vhd 2007/07/14.09:53:44 H.42
EN work/TRANSFER 1185243988        FL F:/vhdlproject/vhdl0716/transfer.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/TRANSFER/BEHAVIORAL 1185243989 FL F:/vhdlproject/vhdl0716/transfer.vhd \
      EN work/TRANSFER 1185243988
FL F:/vhdlproject/vhdl0716/dataformat_adjust_log.vhd 2007/07/11.15:57:34 H.42
EN work/DATAFORMAT_ADJUST_LOG 1185244000 \
      FL F:/vhdlproject/vhdl0716/dataformat_adjust_log.vhd PB ieee/STD_LOGIC_1164 1106404628 \
      PB ieee/STD_LOGIC_ARITH 1106404630 PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/DATAFORMAT_ADJUST_LOG/BEHAVIORAL 1185244001 \
      FL F:/vhdlproject/vhdl0716/dataformat_adjust_log.vhd \
      EN work/DATAFORMAT_ADJUST_LOG 1185244000
FL F:/vhdlproject/vhdl0716/top_uart.vhd 2007/07/11.16:13:28 H.42
EN work/TOP_UART 1185243990        FL F:/vhdlproject/vhdl0716/top_uart.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634 PH unisim/VCOMPONENTS 1122082370
AR work/TOP_UART/BEHAVIORAL 1185243991 FL F:/vhdlproject/vhdl0716/top_uart.vhd \
      EN work/TOP_UART 1185243990 CP BAUD  CP RECIEVER       CP TRANSFER
FL F:/vhdlproject/vhdl0716/add_accumulator.vhd 2007/07/11.15:53:02 H.42
EN work/ADD_ACCUMULATOR 1185243996 FL F:/vhdlproject/vhdl0716/add_accumulator.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/ADD_ACCUMULATOR/BEHAVIORAL 1185243997 FL F:/vhdlproject/vhdl0716/add_accumulator.vhd \
      EN work/ADD_ACCUMULATOR 1185243996
FL F:/vhdlproject/vhdl0716/reciever.vhd 2007/07/24.10:03:14 H.42
EN work/RECIEVER 1185243986        FL F:/vhdlproject/vhdl0716/reciever.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/RECIEVER/BEHAVIORAL 1185243987 FL F:/vhdlproject/vhdl0716/reciever.vhd \
      EN work/RECIEVER 1185243986
FL F:/vhdlproject/vhdl0716/select_clk.vhd 2007/07/11.16:08:56 H.42
EN work/SELECT_CLK 1185243992      FL F:/vhdlproject/vhdl0716/select_clk.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/SELECT_CLK/BEHAVIORAL 1185243993 FL F:/vhdlproject/vhdl0716/select_clk.vhd \
      EN work/SELECT_CLK 1185243992
FL F:/vhdlproject/vhdl0716/narrow_wide_pulse_generate.vhd 2007/07/16.23:33:50 H.42
EN work/NARROW_WIDE_PULSE_GENERATE 1185244010 \
      FL F:/vhdlproject/vhdl0716/narrow_wide_pulse_generate.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/NARROW_WIDE_PULSE_GENERATE/BEHAVIORAL 1185244011 \
      FL F:/vhdlproject/vhdl0716/narrow_wide_pulse_generate.vhd \
      EN work/NARROW_WIDE_PULSE_GENERATE 1185244010
FL F:/vhdlproject/vhdl0716/accumulator_ctr_dataadjust.vhd 2007/07/11.15:47:48 H.42
EN work/ACCUMULATOR_CTR_DATAADJUST 1185243998 \
      FL F:/vhdlproject/vhdl0716/accumulator_ctr_dataadjust.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/ACCUMULATOR_CTR_DATAADJUST/BEHAVIORAL 1185243999 \
      FL F:/vhdlproject/vhdl0716/accumulator_ctr_dataadjust.vhd \
      EN work/ACCUMULATOR_CTR_DATAADJUST 1185243998
FL F:/vhdlproject/vhdl0716/readfifo_rs232.vhd 2007/07/11.16:08:24 H.42
EN work/READFIFO_RS232 1185244008  FL F:/vhdlproject/vhdl0716/readfifo_rs232.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/READFIFO_RS232/BEHAVIORAL 1185244009 FL F:/vhdlproject/vhdl0716/readfifo_rs232.vhd \
      EN work/READFIFO_RS232 1185244008
FL F:/vhdlproject/vhdl0716/mux_log_wide_narrow.vhd 2007/07/11.16:05:42 H.42
EN work/MUX_LOG_WIDE_NARROW 1185244006 FL F:/vhdlproject/vhdl0716/mux_log_wide_narrow.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/MUX_LOG_WIDE_NARROW/BEHAVIORAL 1185244007 \
      FL F:/vhdlproject/vhdl0716/mux_log_wide_narrow.vhd \
      EN work/MUX_LOG_WIDE_NARROW 1185244006
FL F:/vhdlproject/vhdl0716/dataformat_adjust_narrowfreq.vhd 2007/07/11.16:00:32 H.42
EN work/DATAFORMAT_ADJUST_NARROWFREQ 1185244002 \
      FL F:/vhdlproject/vhdl0716/dataformat_adjust_narrowfreq.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/DATAFORMAT_ADJUST_NARROWFREQ/BEHAVIORAL 1185244003 \
      FL F:/vhdlproject/vhdl0716/dataformat_adjust_narrowfreq.vhd \
      EN work/DATAFORMAT_ADJUST_NARROWFREQ 1185244002
FL F:/vhdlproject/vhdl0716/baud.vhd 2007/07/11.16:16:04 H.42
EN work/BAUD 1185243984            FL F:/vhdlproject/vhdl0716/baud.vhd \
      PB ieee/STD_LOGIC_1164 1106404628 PB ieee/STD_LOGIC_ARITH 1106404630 \
      PB ieee/STD_LOGIC_UNSIGNED 1106404634
AR work/BAUD/BEHAVIORAL 1185243985 FL F:/vhdlproject/vhdl0716/baud.vhd EN work/BAUD 1185243984