📄 adc_test.cdc
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#ChipScope Core Inserter Project File Version 3.0
#Mon Jul 23 22:52:57 CST 2007
Project.device.designInputFile=f\:\\vhdlproject\\vhdl0716\\top_fmdm_project_cs.ngc
Project.device.designOutputFile=f\:\\vhdlproject\\vhdl0716\\top_fmdm_project_cs.ngc
Project.device.deviceFamily=2
Project.device.enableRPMs=true
Project.device.outputDirectory=f\:\\vhdlproject\\vhdl0716\\_ngo
Project.device.useSRL16=true
Project.filter.dimension=9
Project.filter<0>=uart*
Project.filter<1>=
Project.filter<2>=adc*
Project.filter<3>=adc8
Project.filter<4>=read*
Project.filter<5>=fifo*
Project.filter<6>=top_uart
Project.filter<7>=top*
Project.filter<8>=uart
Project.icon.boundaryScanChain=0
Project.icon.disableBUFGInsertion=false
Project.icon.enableExtTriggerIn=false
Project.icon.enableExtTriggerOut=false
Project.icon.triggerInPinName=
Project.icon.triggerOutPinName=
Project.unit.dimension=1
Project.unit<0>.clockChannel=uart/u_baud/baud_bclk
Project.unit<0>.clockEdge=Rising
Project.unit<0>.dataChannel<0>=adclog/data_out_toaccumulator<0>
Project.unit<0>.dataChannel<10>=adclog/data_out_toaccumulator<10>
Project.unit<0>.dataChannel<11>=adclog/data_out_toaccumulator<11>
Project.unit<0>.dataChannel<12>=adcwide/data_out_toaccumulator<0>
Project.unit<0>.dataChannel<13>=adcwide/data_out_toaccumulator<1>
Project.unit<0>.dataChannel<14>=adcwide/data_out_toaccumulator<2>
Project.unit<0>.dataChannel<15>=adcwide/data_out_toaccumulator<3>
Project.unit<0>.dataChannel<16>=adcwide/data_out_toaccumulator<4>
Project.unit<0>.dataChannel<17>=adcwide/data_out_toaccumulator<5>
Project.unit<0>.dataChannel<18>=adcwide/data_out_toaccumulator<6>
Project.unit<0>.dataChannel<19>=adcwide/data_out_toaccumulator<7>
Project.unit<0>.dataChannel<1>=adclog/data_out_toaccumulator<1>
Project.unit<0>.dataChannel<20>=adcwide/data_out_toaccumulator<8>
Project.unit<0>.dataChannel<21>=adcwide/data_out_toaccumulator<9>
Project.unit<0>.dataChannel<22>=adcwide/data_out_toaccumulator<10>
Project.unit<0>.dataChannel<23>=adcwide/data_out_toaccumulator<11>
Project.unit<0>.dataChannel<24>=adcnarrow/data_out_toaccumulator<0>
Project.unit<0>.dataChannel<25>=adcnarrow/data_out_toaccumulator<1>
Project.unit<0>.dataChannel<26>=adcnarrow/data_out_toaccumulator<2>
Project.unit<0>.dataChannel<27>=adcnarrow/data_out_toaccumulator<3>
Project.unit<0>.dataChannel<28>=adcnarrow/data_out_toaccumulator<4>
Project.unit<0>.dataChannel<29>=adcnarrow/data_out_toaccumulator<5>
Project.unit<0>.dataChannel<2>=adclog/data_out_toaccumulator<2>
Project.unit<0>.dataChannel<30>=adcnarrow/data_out_toaccumulator<6>
Project.unit<0>.dataChannel<31>=adcnarrow/data_out_toaccumulator<7>
Project.unit<0>.dataChannel<32>=adcnarrow/data_out_toaccumulator<8>
Project.unit<0>.dataChannel<33>=adcnarrow/data_out_toaccumulator<9>
Project.unit<0>.dataChannel<34>=adcnarrow/data_out_toaccumulator<10>
Project.unit<0>.dataChannel<35>=adcnarrow/data_out_toaccumulator<11>
Project.unit<0>.dataChannel<36>=delay_in_0_IBUF
Project.unit<0>.dataChannel<37>=delay_in_1_IBUF
Project.unit<0>.dataChannel<38>=delay_in_2_IBUF
Project.unit<0>.dataChannel<39>=delay_in_3_IBUF
Project.unit<0>.dataChannel<3>=adclog/data_out_toaccumulator<3>
Project.unit<0>.dataChannel<40>=delay_in_4_IBUF
Project.unit<0>.dataChannel<41>=delay_in_5_IBUF
Project.unit<0>.dataChannel<42>=delay_in_6_IBUF
Project.unit<0>.dataChannel<43>=delay_in_7_IBUF
Project.unit<0>.dataChannel<44>=delay_in_8_IBUF
Project.unit<0>.dataChannel<45>=delay_in_9_IBUF
Project.unit<0>.dataChannel<46>=delay_in_10_IBUF
Project.unit<0>.dataChannel<47>=delay_in_11_IBUF
Project.unit<0>.dataChannel<48>=delay_in_12_IBUF
Project.unit<0>.dataChannel<49>=delay_in_13_IBUF
Project.unit<0>.dataChannel<4>=adclog/data_out_toaccumulator<4>
Project.unit<0>.dataChannel<50>=delay_in_14_IBUF
Project.unit<0>.dataChannel<51>=delay_in_15_IBUF
Project.unit<0>.dataChannel<52>=delay_in_16_IBUF
Project.unit<0>.dataChannel<53>=delay_in_17_IBUF
Project.unit<0>.dataChannel<54>=delay_in_18_IBUF
Project.unit<0>.dataChannel<55>=delay_in_19_IBUF
Project.unit<0>.dataChannel<56>=delay_in_20_IBUF
Project.unit<0>.dataChannel<57>=uart/u_transfer/txds
Project.unit<0>.dataChannel<58>=fifo_rs232_ctr/fifo_enable
Project.unit<0>.dataChannel<59>=fifo empty
Project.unit<0>.dataChannel<5>=adclog/data_out_toaccumulator<5>
Project.unit<0>.dataChannel<60>=uart/u_transfer/txd_done
Project.unit<0>.dataChannel<61>=fifo dout<0>
Project.unit<0>.dataChannel<62>=fifo dout<1>
Project.unit<0>.dataChannel<63>=fifo dout<2>
Project.unit<0>.dataChannel<64>=fifo dout<3>
Project.unit<0>.dataChannel<65>=fifo dout<4>
Project.unit<0>.dataChannel<66>=fifo dout<5>
Project.unit<0>.dataChannel<67>=fifo dout<6>
Project.unit<0>.dataChannel<68>=fifo dout<7>
Project.unit<0>.dataChannel<69>=uart/u_reciever/rbuf<0>
Project.unit<0>.dataChannel<6>=adclog/data_out_toaccumulator<6>
Project.unit<0>.dataChannel<70>=uart/u_reciever/rbuf<1>
Project.unit<0>.dataChannel<71>=uart/u_reciever/rbuf<2>
Project.unit<0>.dataChannel<72>=uart/u_reciever/rbuf<3>
Project.unit<0>.dataChannel<73>=uart/u_reciever/rbuf<4>
Project.unit<0>.dataChannel<74>=uart/u_reciever/rbuf<5>
Project.unit<0>.dataChannel<75>=uart/u_reciever/rbuf<6>
Project.unit<0>.dataChannel<76>=uart/u_reciever/rbuf<7>
Project.unit<0>.dataChannel<77>=uart/u_reciever/r_ready
Project.unit<0>.dataChannel<7>=adclog/data_out_toaccumulator<7>
Project.unit<0>.dataChannel<8>=adclog/data_out_toaccumulator<8>
Project.unit<0>.dataChannel<9>=adclog/data_out_toaccumulator<9>
Project.unit<0>.dataDepth=4096
Project.unit<0>.dataEqualsTrigger=false
Project.unit<0>.dataPortWidth=78
Project.unit<0>.enableGaps=false
Project.unit<0>.enableStorageQualification=true
Project.unit<0>.enableTimestamps=false
Project.unit<0>.timestampDepth=0
Project.unit<0>.timestampWidth=0
Project.unit<0>.triggerChannel<0><0>=reset_IBUF
Project.unit<0>.triggerConditionCountWidth=0
Project.unit<0>.triggerMatchCount<0>=1
Project.unit<0>.triggerMatchCountWidth<0><0>=0
Project.unit<0>.triggerMatchType<0><0>=0
Project.unit<0>.triggerPortCount=1
Project.unit<0>.triggerPortIsData<0>=true
Project.unit<0>.triggerPortWidth<0>=1
Project.unit<0>.triggerSequencerLevels=16
Project.unit<0>.triggerSequencerType=1
Project.unit<0>.type=ilapro
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