top.hif

16位CUPIP核,完全运行的好的东西,可以直接拿来用的!

Version 4.1 Build 181 06/29/2004 SJ Full Version
31
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# entity
control1
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
control1.vhd
1113882928
4
# storage
db|top.(1).cnf
db|top.(1).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# include_file {
cpu_lib.VHD
1108453968
}
# end
# entity
comp
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
comp.vhd
1108454132
4
# storage
db|top.(2).cnf
db|top.(2).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# include_file {
cpu_lib.VHD
1108453968
}
# end
# entity
reg_l
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
reg_l.vhd
1113241144
4
# storage
db|top.(3).cnf
db|top.(3).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# include_file {
cpu_lib.VHD
1108453968
}
# end
# entity
trireg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
trireg.vhd
1106403314
4
# storage
db|top.(5).cnf
db|top.(5).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# include_file {
cpu_lib.VHD
1108453968
}
# end
# entity
shift
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
shift.vhd
1108452870
4
# storage
db|top.(6).cnf
db|top.(6).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# include_file {
cpu_lib.VHD
1108453968
}
# end
# entity
alu
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
alu.vhd
1104943090
4
# storage
db|top.(7).cnf
db|top.(7).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# include_file {
cpu_lib.VHD
1108453968
}
# end
# entity
lpm_bustri0
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
lpm_bustri0.vhd
1109669224
4
# storage
db|top.(8).cnf
db|top.(8).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# include_file {
cpu_lib.VHD
1108453968
}
# end
# entity
regarray
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
regarray.vhd
1104944284
4
# storage
db|top.(10).cnf
db|top.(10).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# include_file {
cpu_lib.VHD
1108453968
}
# end
# entity
ram_a
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
ram_a.vhd
1113876964
4
# storage
db|top.(11).cnf
db|top.(11).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# include_file {
cpu_lib.VHD
1108453968
}
# end
# entity
altsyncram_5n21
# case_insensitive
# source_file
db|altsyncram_5n21.tdf
1156390488
6
# storage
db|top.(13).cnf
db|top.(13).cnf
# used_port {
wren_a
data_a0
data_a1
data_a2
data_a3
data_a4
data_a5
data_a6
data_a7
data_a8
data_a9
data_a10
data_a11
data_a12
data_a13
data_a14
data_a15
address_a0
address_a1
address_a2
address_a3
address_a4
address_a5
address_a6
clock0
q_a0
q_a1
q_a2
q_a3
q_a4
q_a5
q_a6
q_a7
q_a8
q_a9
q_a10
q_a11
q_a12
q_a13
q_a14
q_a15
}
# end
# entity
dsp
# case_insensitive
# source_file
dsp.bdf
1155908092
23
# storage
db|top.(18).cnf
db|top.(18).cnf
# end
# entity
mux_bfc
# case_insensitive
# source_file
db|mux_bfc.tdf
1156390490
6
# storage
db|top.(20).cnf
db|top.(20).cnf
# used_port {
data0
data1
data2
data3
data4
data5
data6
data7
sel0
sel1
sel2
result0
}
# end
# entity
mux_ugc
# case_insensitive
# source_file
db|mux_ugc.tdf
1156390492
6
# storage
db|top.(22).cnf
db|top.(22).cnf
# used_port {
data0
data1
data2
data3
data4
data5
data6
data7
data8
data9
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data20
data21
data22
data23
data24
data25
data26
data27
data28
data29
data30
data31
data32
data33
data34
data35
data36
data37
data38
data39
data40
data41
data42
data43
data44
data45
data46
data47
data48
data49
data50
data51
data52
data53
data54
data55
data56
data57
data58
data59
data60
data61
data62
data63
data64
data65
data66
data67
data68
data69
data70
data71
data72
data73
data74
data75
data76
data77
data78
data79
data80
data81
data82
data83
data84
data85
data86
data87
data88
data89
data90
data91
data92
data93
data94
data95
data96
data97
data98
data99
data100
data101
data102
data103
data104
data105
data106
data107
data108
data109
data110
data111
data112
data113
data114
data115
data116
data117
data118
data119
data120
data121
data122
data123
data124
data125
data126
data127
data128
data129
data130
data131
data132
data133
data134
data135
data136
data137
data138
data139
data140
data141
data142
data143
data144
data145
data146
data147
data148
data149
data150
data151
data152
data153
data154
data155
data156
data157
data158
data159
sel0
sel1
sel2
sel3
sel4
result0
result1
result2
result3
result4
result5
result6
result7
}
# end
# entity
cnt4
# case_insensitive
# source_file
cnt4.bdf
1155908128
23
# storage
db|top.(23).cnf
db|top.(23).cnf
# end
# entity
cntr_fa7
# case_insensitive
# source_file
db|cntr_fa7.tdf
1156390492
6
# storage
db|top.(25).cnf
db|top.(25).cnf
# used_port {
clock
aclr
q0
q1
q2
q3
q4
}
# end
# entity
cnt3
# case_insensitive
# source_file
cnt3.bdf
1155908160
23
# storage
db|top.(26).cnf
db|top.(26).cnf
# end
# entity
cntr_da7
# case_insensitive
# source_file
db|cntr_da7.tdf
1156390492
6
# storage
db|top.(28).cnf
db|top.(28).cnf
# used_port {
clock
aclr
q0
q1
q2
}
# end
# entity
cntr_bn8
# case_insensitive
# source_file
db|cntr_bn8.tdf
1156390498
6
# storage
db|top.(42).cnf
db|top.(42).cnf
# used_port {
clock
clk_en
aset
q0
q1
q2
q3
q4
q5
}
# end
# entity
cntr_319
# case_insensitive
# source_file
db|cntr_319.tdf
1156390498
6
# storage
db|top.(45).cnf
db|top.(45).cnf
# used_port {
clock
clk_en
cnt_en
aclr
sclr
q0
q1
q2
q3
q4
q5
}
# end
# entity
cntr_fp9
# case_insensitive
# source_file
db|cntr_fp9.tdf
1156390500
6
# storage
db|top.(56).cnf
db|top.(56).cnf
# used_port {
clock
clk_en
aclr
q0
q1
q2
q3
q4
q5
cout
}
# end
# entity
cntr_nv7
# case_insensitive
# source_file
db|cntr_nv7.tdf
1156390506
6
# storage
db|top.(62).cnf
db|top.(62).cnf
# used_port {
clock
clk_en
aclr
q0
q1
q2
q3
q4
q5
q6
}
# end
# entity
cntr_5j7
# case_insensitive
# source_file
db|cntr_5j7.tdf
1156390506
6
# storage
db|top.(64).cnf
db|top.(64).cnf
# used_port {
clock
clk_en
aclr
q0
q1
q2
q3
q4
q5
}
# end
# entity
decode_9ie
# case_insensitive
# source_file
db|decode_9ie.tdf
1156390510
6
# storage
db|top.(72).cnf
db|top.(72).cnf
# used_port {
aclr
clken
clock
data0
data1
data2
enable
eq0
eq1
eq2
eq3
eq4
eq5
eq6
eq7
}
# end
# entity
cntr_u98
# case_insensitive
# source_file
db|cntr_u98.tdf
1156390530
6
# storage
db|top.(79).cnf
db|top.(79).cnf
# used_port {
data0
data1
data2
data3
data4
data5
data6
clock
aclr
sload
q0
q1
q2
q3
q4
q5
q6
}
# end
# entity
cntr_qd8
# case_insensitive
# source_file
db|cntr_qd8.tdf
1156390530
6
# storage
db|top.(81).cnf
db|top.(81).cnf
# used_port {
clock
cnt_en
aclr
sclr
q0
q1
q2
q3
q4
}
# end
# entity
altsyncram_7gd2
# case_insensitive
# source_file
db|altsyncram_7gd2.tdf
1156390488
6
# storage
db|top.(14).cnf
db|top.(14).cnf
# used_port {
address_a0
address_a1
address_a2
address_a3
address_a4
address_a5
address_a6
address_b0
address_b1
address_b2
address_b3
address_b4
address_b5
address_b6
clock0
clock1
data_a0
data_a1
data_a2
data_a3
data_a4
data_a5
data_a6
data_a7
data_a8
data_a9
data_a10
data_a11
data_a12
data_a13
data_a14
data_a15
data_b0
data_b1
data_b2
data_b3
data_b4
data_b5
data_b6
data_b7
data_b8
data_b9
data_b10
data_b11
data_b12
data_b13
data_b14
data_b15
wren_a
wren_b
q_a0
q_a1
q_a2
q_a3
q_a4
q_a5
q_a6
q_a7
q_a8
q_a9
q_a10
q_a11
q_a12
q_a13
q_a14
q_a15
q_b0
q_b1
q_b2
q_b3
q_b4
q_b5
q_b6
q_b7
q_b8
q_b9
q_b10
q_b11
q_b12
q_b13
q_b14
q_b15
}
# memory_file {
RAM_16.mif
1156400324
}
# end
# entity
lpm_bustri
# case_insensitive
# source_file
..|..|..|altera|quartus41|libraries|megafunctions|lpm_bustri.tdf
1088009428
6
# storage
db|top.(12).cnf
db|top.(12).cnf
# user_parameter {
LPM_WIDTH
16
PARAMETER_DEC
USR
}
# used_port {
data0
data10
data11
data12
data13
data14
data15
data1
data2
data3
data4
data5
data6
data7
data8
data9
enabledt
tridata0
tridata10
tridata11
tridata12
tridata13
tridata14
tridata15
tridata1
tridata2
tridata3
tridata4
tridata5
tridata6
tridata7
tridata8
tridata9
}
# end
# entity
altsyncram
# case_insensitive
# source_file
..|..|..|altera|quartus41|libraries|megafunctions|altsyncram.tdf
1088009418
6