top.tan.qmsg

16位CUPIP核,完全运行的好的东西,可以直接拿来用的!

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "55 " "Warning: Found 55 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[1\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[1\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[1\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[3\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[3\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[3\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[2\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[2\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[2\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[0\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[0\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[0\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[6\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[6\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[6\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[5\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[5\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[5\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[7\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[7\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[7\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[4\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[4\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[4\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|Q\[5\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|Q\[5\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 154 28 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|Q\[5\]" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "STEP9:inst2\|SCHKT:inst1\|CLKA~60 " "Info: Detected gated clock STEP9:inst2\|SCHKT:inst1\|CLKA~60 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 85 28 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|CLKA~60" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "STEP9:inst2\|SCHKT:inst1\|CLKA~59 " "Info: Detected gated clock STEP9:inst2\|SCHKT:inst1\|CLKA~59 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 70 28 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|CLKA~59" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[9\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[9\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[9\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[8\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[8\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 155 79 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|lpm_counter:CT8_rtl_0\|cntr_pt6:auto_generated\|safe_q\[8\]" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "STEP9:inst2\|SCHKT:inst1\|CLKA~61 " "Info: Detected gated clock STEP9:inst2\|SCHKT:inst1\|CLKA~61 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 91 28 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|CLKA~61" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|Q\[3\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|Q\[3\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 154 28 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|Q\[3\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|Q\[4\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|Q\[4\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 154 28 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|Q\[4\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|Q\[1\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|Q\[1\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 154 28 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|Q\[1\]" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "STEP9:inst2\|SCHKT:inst1\|A1~24 " "Info: Detected gated clock STEP9:inst2\|SCHKT:inst1\|A1~24 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 136 26 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|A1~24" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|Q\[0\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|Q\[0\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 154 28 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|Q\[0\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|Q\[2\] " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|Q\[2\] as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 154 28 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|Q\[2\]" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "inst27 " "Info: Detected gated clock inst27 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" "" "" { Schematic "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" { { -128 360 424 -80 "inst27" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "inst27" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "dsp:inst25\|cnt3:216\|lpm_counter:1\|cntr_da7:auto_generated\|safe_q\[2\] " "Info: Detected ripple clock dsp:inst25\|cnt3:216\|lpm_counter:1\|cntr_da7:auto_generated\|safe_q\[2\] as buffer" {  } { { "D:/16BITCPU/cpu_16B/db/cntr_da7.tdf" "" "" { Text "D:/16BITCPU/cpu_16B/db/cntr_da7.tdf" 68 8 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "dsp:inst25\|cnt3:216\|lpm_counter:1\|cntr_da7:auto_generated\|safe_q\[2\]" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "dsp:inst25\|135~13 " "Info: Detected gated clock dsp:inst25\|135~13 as buffer" {  } { { "D:/16BITCPU/cpu_16B/dsp.bdf" "" "" { Schematic "D:/16BITCPU/cpu_16B/dsp.bdf" { { 288 456 520 328 "135" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "dsp:inst25\|135~13" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "dsp:inst25\|cnt3:216\|lpm_counter:1\|cntr_da7:auto_generated\|safe_q\[0\] " "Info: Detected ripple clock dsp:inst25\|cnt3:216\|lpm_counter:1\|cntr_da7:auto_generated\|safe_q\[0\] as buffer" {  } { { "D:/16BITCPU/cpu_16B/db/cntr_da7.tdf" "" "" { Text "D:/16BITCPU/cpu_16B/db/cntr_da7.tdf" 68 8 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "dsp:inst25\|cnt3:216\|lpm_counter:1\|cntr_da7:auto_generated\|safe_q\[0\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "dsp:inst25\|cnt3:216\|lpm_counter:1\|cntr_da7:auto_generated\|safe_q\[1\] " "Info: Detected ripple clock dsp:inst25\|cnt3:216\|lpm_counter:1\|cntr_da7:auto_generated\|safe_q\[1\] as buffer" {  } { { "D:/16BITCPU/cpu_16B/db/cntr_da7.tdf" "" "" { Text "D:/16BITCPU/cpu_16B/db/cntr_da7.tdf" 68 8 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "dsp:inst25\|cnt3:216\|lpm_counter:1\|cntr_da7:auto_generated\|safe_q\[1\]" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "inst11 " "Info: Detected gated clock inst11 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" "" "" { Schematic "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" { { 32 232 296 80 "inst11" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "inst11" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "inst20 " "Info: Detected gated clock inst20 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" "" "" { Schematic "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" { { 288 464 528 336 "inst20" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "inst20" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "reg_l:inst13\|q\[15\] " "Info: Detected ripple clock reg_l:inst13\|q\[15\] as buffer" {  } { { "D:/16BITCPU/cpu_16B/reg_l.vhd" "" "" { Text "D:/16BITCPU/cpu_16B/reg_l.vhd" 8 -1 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "reg_l:inst13\|q\[15\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~45 " "Info: Detected ripple clock control1:inst3\|current_state~45 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~45" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "control1:inst3\|outRegWr " "Info: Detected gated clock control1:inst3\|outRegWr as buffer" {  } { { "D:/16BITCPU/cpu_16B/control1.vhd" "" "" { Text "D:/16BITCPU/cpu_16B/control1.vhd" 14 -1 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|outRegWr" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "control1:inst3\|aluSel\[1\]~64 " "Info: Detected gated clock control1:inst3\|aluSel\[1\]~64 as buffer" {  } { { "D:/16BITCPU/cpu_16B/control1.vhd" "" "" { Text "D:/16BITCPU/cpu_16B/control1.vhd" 17 -1 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|aluSel\[1\]~64" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~41 " "Info: Detected ripple clock control1:inst3\|current_state~41 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~41" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~64 " "Info: Detected ripple clock control1:inst3\|current_state~64 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~64" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~59 " "Info: Detected ripple clock control1:inst3\|current_state~59 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~59" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~54 " "Info: Detected ripple clock control1:inst3\|current_state~54 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~54" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~21 " "Info: Detected ripple clock control1:inst3\|current_state~21 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~21" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~33 " "Info: Detected ripple clock control1:inst3\|current_state~33 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~33" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~39 " "Info: Detected ripple clock control1:inst3\|current_state~39 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~39" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~71 " "Info: Detected ripple clock control1:inst3\|current_state~71 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~71" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~68 " "Info: Detected ripple clock control1:inst3\|current_state~68 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~68" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "control1:inst3\|next_state.incpc~53 " "Info: Detected gated clock control1:inst3\|next_state.incpc~53 as buffer" {  } { { "D:/16BITCPU/cpu_16B/control1.vhd" "" "" { Text "D:/16BITCPU/cpu_16B/control1.vhd" 29 -1 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|next_state.incpc~53" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "STEP9:inst2\|step:inst7\|clk " "Info: Detected gated clock STEP9:inst2\|step:inst7\|clk as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 146 23 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|step:inst7\|clk" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|step:inst7\|t4 " "Info: Detected ripple clock STEP9:inst2\|step:inst7\|t4 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 142 22 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|step:inst7\|t4" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|step:inst7\|t2 " "Info: Detected ripple clock STEP9:inst2\|step:inst7\|t2 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 140 22 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|step:inst7\|t2" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "STEP9:inst2\|SCHKT:inst1\|A1~22 " "Info: Detected gated clock STEP9:inst2\|SCHKT:inst1\|A1~22 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 137 26 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|A1~22" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|SCHKT:inst1\|ENA " "Info: Detected ripple clock STEP9:inst2\|SCHKT:inst1\|ENA as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 138 24 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|SCHKT:inst1\|ENA" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "STEP9:inst2\|step:inst7\|t1 " "Info: Detected ripple clock STEP9:inst2\|step:inst7\|t1 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 143 22 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|step:inst7\|t1" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "STEP9:inst2\|inst11 " "Info: Detected gated clock STEP9:inst2\|inst11 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 144 13 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|inst11" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~69 " "Info: Detected ripple clock control1:inst3\|current_state~69 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~69" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~35 " "Info: Detected ripple clock control1:inst3\|current_state~35 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~35" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~37 " "Info: Detected ripple clock control1:inst3\|current_state~37 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~37" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "STEP9:inst2\|inst8 " "Info: Detected gated clock STEP9:inst2\|inst8 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/STEP9.vqm" 147 12 0 } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "STEP9:inst2\|inst8" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~25 " "Info: Detected ripple clock control1:inst3\|current_state~25 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~25" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "control1:inst3\|current_state~49 " "Info: Detected ripple clock control1:inst3\|current_state~49 as buffer" {  } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "control1:inst3\|current_state~49" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "inst22 " "Info: Detected gated clock inst22 as buffer" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" "" "" { Schematic "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" { { 192 640 688 256 "inst22" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "inst22" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "STEP register reg:inst12\|q\[13\] register control1:inst3\|current_state~53 56.35 MHz 17.747 ns Internal " "Info: Clock STEP has Internal fmax of 56.35 MHz between source register reg:inst12\|q\[13\] and destination register control1:inst3\|current_state~53 (period= 17.747 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.896 ns + Longest register register " "Info: + Longest register to register delay is 11.896 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns reg:inst12\|q\[13\] 1 REG LC_X21_Y14_N6 18 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X21_Y14_N6; Fanout = 18; REG Node = 'reg:inst12\|q\[13\]'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "" { reg:inst12|q[13] } "NODE_NAME" } } } { "D:/16BITCPU/CH6_Expt/DEMO_62/reg.vhd" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/reg.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.563 ns) + CELL(0.590 ns) 1.153 ns control1:inst3\|regSel\[0\]~1197 2 COMB LC_X21_Y14_N7 1 " "Info: 2: + IC(0.563 ns) + CELL(0.590 ns) = 1.153 ns; Loc. = LC_X21_Y14_N7; Fanout = 1; COMB Node = 'control1:inst3\|regSel\[0\]~1197'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.153 ns" { reg:inst12|q[13] control1:inst3|regSel[0]~1197 } "NODE_NAME" } } } { "D:/16BITCPU/cpu_16B/control1.vhd" "" "" { Text "D:/16BITCPU/cpu_16B/control1.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.425 ns) + CELL(0.590 ns) 2.168 ns control1:inst3\|regSel\[0\]~1198 3 COMB LC_X21_Y14_N1 1 " "Info: 3: + IC(0.425 ns) + CELL(0.590 ns) = 2.168 ns; Loc. = LC_X21_Y14_N1; Fanout = 1; COMB Node = 'control1:inst3\|regSel\[0\]~1198'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.015 ns" { control1:inst3|regSel[0]~1197 control1:inst3|regSel[0]~1198 } "NODE_NAME" } } } { "D:/16BITCPU/cpu_16B/control1.vhd" "" "" { Text "D:/16BITCPU/cpu_16B/control1.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.182 ns) + CELL(0.114 ns) 2.464 ns control1:inst3\|regSel\[0\]~1200 4 COMB LC_X21_Y14_N2 58 " "Info: 4: + IC(0.182 ns) + CELL(0.114 ns) = 2.464 ns; Loc. = LC_X21_Y14_N2; Fanout = 58; COMB Node = 'control1:inst3\|regSel\[0\]~1200'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "0.296 ns" { control1:inst3|regSel[0]~1198 control1:inst3|regSel[0]~1200 } "NODE_NAME" } } } { "D:/16BITCPU/cpu_16B/control1.vhd" "" "" { Text "D:/16BITCPU/cpu_16B/control1.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.374 ns) + CELL(0.442 ns) 4.280 ns regarray:inst10\|temp_data\[9\]~80 5 COMB LC_X22_Y16_N9 1 " "Info: 5: + IC(1.374 ns) + CELL(0.442 ns) = 4.280 ns; Loc. = LC_X22_Y16_N9; Fanout = 1; COMB Node = 'regarray:inst10\|temp_data\[9\]~80'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.816 ns" { control1:inst3|regSel[0]~1200 regarray:inst10|temp_data[9]~80 } "NODE_NAME" } } } { "D:/16BITCPU/cpu_16B/regarray.vhd" "" "" { Text "D:/16BITCPU/cpu_16B/regarray.vhd" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.220 ns) + CELL(0.114 ns) 5.614 ns regarray:inst10\|temp_data\[9\]~81 6 COMB LC_X23_Y12_N5 1 " "Info: 6: + IC(1.220 ns) + CELL(0.114 ns) = 5.614 ns; Loc. = LC_X23_Y12_N5; Fanout = 1; COMB Node = 'regarray:inst10\|temp_data\[9\]~81'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.334 ns" { regarray:inst10|temp_data[9]~80 regarray:inst10|temp_data[9]~81 } "NODE_NAME" } } } { "D:/16BITCPU/cpu_16B/regarray.vhd" "" "" { Text "D:/16BITCPU/cpu_16B/regarray.vhd" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.150 ns) + CELL(0.114 ns) 6.878 ns gdfx_temp0\[9\]~1352 7 COMB LC_X20_Y12_N8 3 " "Info: 7: + IC(1.150 ns) + CELL(0.114 ns) = 6.878 ns; Loc. = LC_X20_Y12_N8; Fanout = 3; COMB Node = 'gdfx_temp0\[9\]~1352'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.264 ns" { regarray:inst10|temp_data[9]~81 gdfx_temp0[9]~1352 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.265 ns) + CELL(0.114 ns) 8.257 ns gdfx_temp0\[9\]~1353 8 COMB LC_X21_Y9_N7 24 " "Info: 8: + IC(1.265 ns) + CELL(0.114 ns) = 8.257 ns; Loc. = LC_X21_Y9_N7; Fanout = 24; COMB Node = 'gdfx_temp0\[9\]~1353'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.379 ns" { gdfx_temp0[9]~1352 gdfx_temp0[9]~1353 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.206 ns) + CELL(0.564 ns) 10.027 ns comp:inst1\|LessThan~13COUT0 9 COMB LC_X20_Y9_N1 1 " "Info: 9: + IC(1.206 ns) + CELL(0.564 ns) = 10.027 ns; Loc. = LC_X20_Y9_N1; Fanout = 1; COMB Node = 'comp:inst1\|LessThan~13COUT0'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.770 ns" { gdfx_temp0[9]~1353 comp:inst1|LessThan~13COUT0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 10.105 ns comp:inst1\|LessThan~14COUT0 10 COMB LC_X20_Y9_N2 1 " "Info: 10: + IC(0.000 ns) + CELL(0.078 ns) = 10.105 ns; Loc. = LC_X20_Y9_N2; Fanout = 1; COMB Node = 'comp:inst1\|LessThan~14COUT0'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "0.078 ns" { comp:inst1|LessThan~13COUT0 comp:inst1|LessThan~14COUT0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 10.183 ns comp:inst1\|LessThan~15COUT0 11 COMB LC_X20_Y9_N3 1 " "Info: 11: + IC(0.000 ns) + CELL(0.078 ns) = 10.183 ns; Loc. = LC_X20_Y9_N3; Fanout = 1; COMB Node = 'comp:inst1\|LessThan~15COUT0'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "0.078 ns" { comp:inst1|LessThan~14COUT0 comp:inst1|LessThan~15COUT0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 10.361 ns comp:inst1\|LessThan~16 12 COMB LC_X20_Y9_N4 1 " "Info: 12: + IC(0.000 ns) + CELL(0.178 ns) = 10.361 ns; Loc. = LC_X20_Y9_N4; Fanout = 1; COMB Node = 'comp:inst1\|LessThan~16'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "0.178 ns" { comp:inst1|LessThan~15COUT0 comp:inst1|LessThan~16 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.621 ns) 10.982 ns comp:inst1\|LessThan~19 13 COMB LC_X20_Y9_N7 3 " "Info: 13: + IC(0.000 ns) + CELL(0.621 ns) = 10.982 ns; Loc. = LC_X20_Y9_N7; Fanout = 3; COMB Node = 'comp:inst1\|LessThan~19'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "0.621 ns" { comp:inst1|LessThan~16 comp:inst1|LessThan~19 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.436 ns) + CELL(0.478 ns) 11.896 ns control1:inst3\|current_state~53 14 REG LC_X20_Y9_N9 3 " "Info: 14: + IC(0.436 ns) + CELL(0.478 ns) = 11.896 ns; Loc. = LC_X20_Y9_N9; Fanout = 3; REG Node = 'control1:inst3\|current_state~53'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "0.914 ns" { comp:inst1|LessThan~19 control1:inst3|current_state~53 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.075 ns 34.26 % " "Info: Total cell delay = 4.075 ns ( 34.26 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.821 ns 65.74 % " "Info: Total interconnect delay = 7.821 ns ( 65.74 % )" {  } {  } 0}  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "11.896 ns" { reg:inst12|q[13] control1:inst3|regSel[0]~1197 control1:inst3|regSel[0]~1198 control1:inst3|regSel[0]~1200 regarray:inst10|temp_data[9]~80 regarray:inst10|temp_data[9]~81 gdfx_temp0[9]~1352 gdfx_temp0[9]~1353 comp:inst1|LessThan~13COUT0 comp:inst1|LessThan~14COUT0 comp:inst1|LessThan~15COUT0 comp:inst1|LessThan~16 comp:inst1|LessThan~19 control1:inst3|current_state~53 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-5.590 ns - Smallest " "Info: - Smallest clock skew is -5.590 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "STEP destination 2.889 ns + Shortest register " "Info: + Shortest clock path from clock STEP to destination register is 2.889 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns STEP 1 CLK PIN_153 52 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 52; CLK Node = 'STEP'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "" { STEP } "NODE_NAME" } } } { "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" "" "" { Schematic "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" { { 336 984 1158 352 "STEP" "" } { -232 1160 1288 -216 "STEP" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.709 ns) + CELL(0.711 ns) 2.889 ns control1:inst3\|current_state~53 2 REG LC_X20_Y9_N9 3 " "Info: 2: + IC(0.709 ns) + CELL(0.711 ns) = 2.889 ns; Loc. = LC_X20_Y9_N9; Fanout = 3; REG Node = 'control1:inst3\|current_state~53'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.420 ns" { STEP control1:inst3|current_state~53 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 75.46 % " "Info: Total cell delay = 2.180 ns ( 75.46 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.709 ns 24.54 % " "Info: Total interconnect delay = 0.709 ns ( 24.54 % )" {  } {  } 0}  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "2.889 ns" { STEP control1:inst3|current_state~53 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "STEP source 8.479 ns - Longest register " "Info: - Longest clock path from clock STEP to source register is 8.479 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns STEP 1 CLK PIN_153 52 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 52; CLK Node = 'STEP'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "" { STEP } "NODE_NAME" } } } { "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" "" "" { Schematic "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" { { 336 984 1158 352 "STEP" "" } { -232 1160 1288 -216 "STEP" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.722 ns) + CELL(0.935 ns) 3.126 ns control1:inst3\|current_state~49 2 REG LC_X11_Y10_N6 2 " "Info: 2: + IC(0.722 ns) + CELL(0.935 ns) = 3.126 ns; Loc. = LC_X11_Y10_N6; Fanout = 2; REG Node = 'control1:inst3\|current_state~49'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.657 ns" { STEP control1:inst3|current_state~49 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.545 ns) + CELL(0.590 ns) 4.261 ns inst22 3 COMB LC_X11_Y10_N1 16 " "Info: 3: + IC(0.545 ns) + CELL(0.590 ns) = 4.261 ns; Loc. = LC_X11_Y10_N1; Fanout = 16; COMB Node = 'inst22'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "1.135 ns" { control1:inst3|current_state~49 inst22 } "NODE_NAME" } } } { "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" "" "" { Schematic "D:/16BITCPU/CH6_Expt/DEMO_62/top.bdf" { { 192 640 688 256 "inst22" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.507 ns) + CELL(0.711 ns) 8.479 ns reg:inst12\|q\[13\] 4 REG LC_X21_Y14_N6 18 " "Info: 4: + IC(3.507 ns) + CELL(0.711 ns) = 8.479 ns; Loc. = LC_X21_Y14_N6; Fanout = 18; REG Node = 'reg:inst12\|q\[13\]'" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "4.218 ns" { inst22 reg:inst12|q[13] } "NODE_NAME" } } } { "D:/16BITCPU/CH6_Expt/DEMO_62/reg.vhd" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/reg.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.705 ns 43.70 % " "Info: Total cell delay = 3.705 ns ( 43.70 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.774 ns 56.30 % " "Info: Total interconnect delay = 4.774 ns ( 56.30 % )" {  } {  } 0}  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "8.479 ns" { STEP control1:inst3|current_state~49 inst22 reg:inst12|q[13] } "NODE_NAME" } } }  } 0}  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "2.889 ns" { STEP control1:inst3|current_state~53 } "NODE_NAME" } } } { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "8.479 ns" { STEP control1:inst3|current_state~49 inst22 reg:inst12|q[13] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/reg.vhd" "" "" { Text "D:/16BITCPU/CH6_Expt/DEMO_62/reg.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } {  } 0}  } { { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "11.896 ns" { reg:inst12|q[13] control1:inst3|regSel[0]~1197 control1:inst3|regSel[0]~1198 control1:inst3|regSel[0]~1200 regarray:inst10|temp_data[9]~80 regarray:inst10|temp_data[9]~81 gdfx_temp0[9]~1352 gdfx_temp0[9]~1353 comp:inst1|LessThan~13COUT0 comp:inst1|LessThan~14COUT0 comp:inst1|LessThan~15COUT0 comp:inst1|LessThan~16 comp:inst1|LessThan~19 control1:inst3|current_state~53 } "NODE_NAME" } } } { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "2.889 ns" { STEP control1:inst3|current_state~53 } "NODE_NAME" } } } { "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" "" "" { Report "D:/16BITCPU/CH6_Expt/DEMO_62/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/16BITCPU/CH6_Expt/DEMO_62/db/top.quartus_db" { Floorplan "" "" "8.479 ns" { STEP control1:inst3|current_state~49 inst22 reg:inst12|q[13] } "NODE_NAME" } } }  } 0}